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PRELIMINARY DATA SHEET
MICRONAS
MSP 34x7G Multistandard Sound Processor Family
Edition March 5, 2001 6251-535-2PD
MICRONAS
MSP 34x7G
Contents Page 5 6 6 7 8 9 9 9 9 10 10 10 12 12 12 12 12 13 13 13 13 13 14 14 14 15 15 16 16 16 16 16 16 16 16 18 19 19 19 21 22 23 29 30 30 Section 1. 1.1. 1.2. 1.3. 2. 2.1. 2.2. 2.2.1. 2.2.2. 2.2.3. 2.2.4. 2.2.5. 2.3. 2.4. 2.5. 2.5.1. 2.5.2. 2.6. 2.6.1. 2.6.2. 2.7. 2.8. 3. 3.1. 3.1.1. 3.1.2. 3.1.3. 3.1.4. 3.1.4.1. 3.1.4.2. 3.1.4.3. 3.1.4.4. 3.2. 3.3. 3.3.1. 3.3.2. 3.3.2.1. 3.3.2.2. 3.3.2.3. 3.3.2.4. 3.3.2.5. 3.3.2.6. 3.3.2.7. 3.4. 3.5. Title
PRELIMINARY DATA SHEET
Introduction Features of the MSP 34x7G Family and Differences to MSPD MSP 34x7G Version List MSP 34x7G Versions and their Application Fields Functional Description Architecture of the MSP 34x7G Family Sound IF Processing Analog Sound IF Input Demodulator: Standards and Features Preprocessing of Demodulator Signals Automatic Sound Select Manual Mode Preprocessing for SCART Source Selection and Output Channel Matrix Audio Baseband Processing Automatic Volume Correction (AVC) Quasi-Peak Detector SCART Signal Routing SCART DSP In and SCART Out Select Stand-by Mode Digital Control I/O Pins and Status Change Indication Clock PLL Oscillator and Crystal Specifications Control Interface I2C Bus Interface Internal Hardware Error Handling Description of CONTROL Register Protocol Description Proposals for General MSP 34x7G I2C Telegrams Symbols Write Telegrams Read Telegrams Examples Start-Up Sequence: Power-Up and I2C-Controlling MSP 34x7G Programming Interface User Registers Overview Description of User Registers STANDARD SELECT Register Refresh of STANDARD SELECT Register STANDARD RESULT Register Write Registers on I2C Subaddress 10hex Read Registers on I2C Subaddress 11hex Write Registers on I2C Subaddress 12hex Read Registers on I2C Subaddress 13hex Programming Tips Examples of Minimum Initialization Codes
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PRELIMINARY DATA SHEET
MSP 34x7G
Contents, continued Page 30 30 30 31 31 31 33 33 34 36 38 39 41 41 42 42 42 43 44 46 46 47 48 49 50 51 51 52 53 57 57 58 59 59 60 60 61 61 62 63 63 63 63 65 65 Section 3.5.1. 3.5.2. 3.5.3. 3.5.4. 3.5.5. 3.5.6. 4. 4.1. 4.2. 4.3. 4.4. 4.5. 4.6. 4.6.1. 4.6.2. 4.6.2.1. 4.6.2.2. 4.6.2.3. 4.6.2.4. 4.6.3. 4.6.3.1. 4.6.3.2. 4.6.3.3. 4.6.3.4. 4.6.3.5. 4.6.3.6. 4.6.3.7. 4.6.3.8. 4.6.3.9. 5. 5.1. 5.2. 5.3. 5.4. 5.5. 5.6. 6. 6.1. 6.2. 6.3. 6.3.1. 6.3.1.1. 6.3.1.2. 6.3.2. 6.3.3. Title B/G-FM (A2 or NICAM) BTSC-Stereo BTSC-SAP with SAP at Loudspeaker Channel FM-Stereo Radio Automatic Standard Detection Software Flow for Interrupt driven STATUS Check Specifications Outline Dimensions Pin Connections and Short Descriptions Pin Descriptions Pin Configurations Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions General Recommended Operating Conditions Analog Input and Output Recommendations Recommendations for Analog Sound IF Input Signal Crystal Recommendations Characteristics General Characteristics Digital Inputs, Digital Outputs Reset Input and Power-Up I2C Bus Characteristics Analog Baseband Inputs and Outputs, AGNDC Sound IF Input Power Supply Rejection Analog Performance Sound Standard Dependent Characteristics Appendix A: Overview of TV Sound Standards NICAM 728 A2 Systems BTSC-Sound System Japanese FM Stereo System (EIA-J) FM Satellite Sound FM-Stereo Radio Appendix B: Manual/Compatibility Mode Demodulator Write and Read Registers for Manual/Compatibility Mode DSP Write and Read Registers for Manual/Compatibility Mode Manual/Compatibility Mode: Description of Demodulator Write Registers Automatic Switching between NICAM and Analog Sound Function in Automatic Sound Select Mode Function in Manual Mode A2 Threshold Carrier-Mute Threshold
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MSP 34x7G
Contents, continued Page 66 68 69 69 71 71 71 71 72 72 72 72 73 73 73 73 73 73 74 74 74 74 74 75 75 75 75 75 77 77 78 80 80 Section 6.3.4. 6.3.5. 6.3.6. 6.3.7. 6.4. 6.4.1. 6.4.2. 6.4.3. 6.4.4. 6.4.5. 6.4.6. 6.4.7. 6.5. 6.5.1. 6.5.2. 6.5.3. 6.5.4. 6.5.5. 6.5.6. 6.5.7. 6.6. 6.6.1. 6.6.2. 6.7. 6.7.1. 6.7.2. 6.8. 6.9. 7. 7.1. 7.2. 8. 9. Title
PRELIMINARY DATA SHEET
Register AD_CV Register MODE_REG FIR-Parameter, Registers FIR1 and FIR2 DCO-Registers Manual/Compatibility Mode: Description of Demodulator Read Registers NICAM Mode Control/Additional Data Bits Register Additional Data Bits Register CIB Bits Register NICAM Error Rate Register PLL_CAPS Readback Register AGC_GAIN Readback Register Automatic Search Function for FM-Carrier Detection in Satellite Mode Manual/Compatibility Mode: Description of DSP Write Registers Additional Channel Matrix Modes Volume Modes of SCART1 Output FM Fixed Deemphasis FM Adaptive Deemphasis NICAM Deemphasis Identification Mode for A2 Stereo Systems FM DC Notch Manual/Compatibility Mode: Description of DSP Read Registers Stereo Detection Register for A2 Stereo Systems DC Level Register Demodulator Source Channels in Manual Mode Terrestric Sound Standards SAT Sound Standards Exclusions of Audio Baseband Features Compatibility Restrictions to MSP 34x7D Appendix D: Application Information Phase Relationship of Analog Outputs Application Circuit Appendix E: MSP 34x7G Version History Data Sheet History
License Notice: "Dolby Pro Logic" is a trademark of Dolby Laboratories. Supply of this implementation of Dolby Technology does not convey a license nor imply a right under any patent, or any other industrial or intellectual property right of Dolby Laboratories, to use this implementation in any finished end-user or ready-to-use final product. Companies planning to use this implementation in products must obtain a license from Dolby Laboratories Licensing Corporation before designing such products.
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PRELIMINARY DATA SHEET
MSP 34x7G
EIA-J. The MSP 34x7G has optimum stereo performance without any adjustments. All MSP 34xxG versions are pin compatible to the MSP 34xxD. Only minor modifications are necessary to adapt a MSP 34xxD controlling software to the MSP 34xxG. The MSP 34x7G further simplifies controlling software. Standard selection requires a single I2C transmission only. Note: The MSP 34x7G version has reduced control registers and less functional pins. The remaining registers are software-compatible to the MSP 34x0G. The pinning is compatible to the MSP 34x0G. The MSP 34x7G has built-in automatic functions: The IC is able to detect the actual sound standard automatically (Automatic Standard Detection). Furthermore, pilot levels and identification signals can be evaluated internally with subsequent switching between mono/ stereo/bilingual; no I2C interaction is necessary (Automatic Sound Selection). The MSP 34x7G can handle very high FM deviations even in conjunction with NICAM processing. This is especially important for the introduction of NICAM in China. The ICs are produced in submicron CMOS technology. The MSP 34x7G is available in the following packages: PSDIP52 and PMQFP44.
Multistandard Sound Processor Family Release Note: Revision bars indicate significant changes to the previous edition. The hardware and software description in this document is valid for the MSP 34x7G version B8 and following versions.
1. Introduction The MSP 34x7G family of single-chip Multistandard Sound Processors covers the sound processing of all analog TV standards worldwide, as well as the NICAM digital sound standards. The full TV sound processing, starting with analog sound IF signal-in, down to processed analog AF-out, is performed in a single chip. Figure 1-1 shows a simplified functional block diagram of the MSP 34x7G. These TV sound processing ICs include versions for processing the multichannel television sound (MTS) signal conforming to the standard recommended by the Broadcast Television Systems Committee (BTSC). The DBX noise reduction, or alternatively, Micronas Noise Reduction (MNR) is performed alignment free. Other processed standards are the Japanese FM-FM multiplex standard (EIA-J) and the FM-Stereo-Radio standard. Current ICs have to perform adjustment procedures in order to achieve good stereo separation for BTSC and
Sound IF1
ADC
Demodulator
Preprocessing
Loudspeaker Sound Processing
DAC
Loudspeaker
SCART1 DAC SCART DSP Input Select MONO
ADC
Prescale
Source Select
SCART Output Select
SCART1
Fig. 1-1: Simplified functional block diagram of MSP 34x7G
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MSP 34x7G
1.1. Features of the MSP 34x7G Family and Differences to MSPD
Feature (Features not available for MSPD are shaded gray.) 3407 X X X X X X X X X X X 3417 X X X X X X X X X X X X X X X
PRELIMINARY DATA SHEET
3427 X X X X X X X X X X
3447 X X X X X X X X X X
3457 X X X X X X X X X X X X X X
3467 X X X X X X X X X X
Standard Selection with single I2C transmission Automatic Standard Detection of terrestrial TV standards Automatic Sound Selection (mono/stereo/bilingual), new registers MODUS, STATUS Automatic Carrier Mute function Interrupt output programmable (indicating status change) Loudspeaker channel with volume AVC: Automatic Volume Correction One Stereo SCART (line) input, one Mono input; one Stereo SCART output Complete SCART in/out switching matrix All analog Mono sound carriers including AM-SECAM L All analog FM-Stereo A2 and satellite standards All NICAM standards Simultaneous demodulation of (very) high-deviation FM-Mono and NICAM Adaptive deemphasis for satellite (Wegener-Panda, acc. to ASTRA specification) Demodulation of the BTSC multiplex signal and the SAP channel Alignment free digital DBX noise reduction for BTSC Stereo and SAP Alignment free digital Micronas Noise Reduction (MNR) for BTSC Stereo and SAP BTSC stereo separation (MSP 3427/47G also EIA-J) significantly better than spec. SAP and stereo detection for BTSC system Korean FM-Stereo A2 standard Alignment-free Japanese standard EIA-J Demodulation of the FM-Radio multiplex signal
X
X
X X
X X
X X X X X X X X X X X X X X X X X X
1.2. MSP 34x7G Version List
Version MSP 3407G MSP 3417G MSP 3427G MSP 3447G MSP 3457G MSP 3467G Status available available not confirmed not confirmed not confirmed not confirmed Description FM Stereo (A2) Version NICAM and FM Stereo (A2) Version NTSC Version (A2 Korea, BTSC with Micronas Noise Reduction (MNR), Japanese EIA-J system) NTSC Version (A2 Korea, BTSC with DBX noise reduction, Japanese EIA-J system) Global Stereo Version (all sound standards) Global Mono Version (all sound standards)
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PRELIMINARY DATA SHEET
MSP 34x7G
1.3. MSP 34x7G Versions and their Application Fields Table 1-1 provides an overview of TV sound standards that can be processed by the MSP 34x7G family. In addition, the MSP 34x7G is able to handle the FMRadio standard. With the MSP 34x7G, a complete multimedia receiver covering all TV sound standards together with terrestrial/cable and satellite radio sound can be built.
Table 1-1: TV Stereo Sound Standards covered by the MSP 34x7G IC Family (details see Appendix A)
MSP Version 3407 TVSystem B/G 5.5/5.85 L I 6.5/5.85 6.0/6.552 6.5/6.2578125 3407 3417 6.5/6.7421875 D/K 3457 6.5/5.7421875 6.5/5.85 6.5 7.02/7.2 7.38/7.56 etc. 4.5/4.724212 3427, 3447 M/N 4.5 4.5 FM-Radio 3467 10.7 FM-Stereo (A2, D/K3) FM-Mono/NICAM (D/K, NICAM) FM-Mono FM-Stereo SECAM-East PAL Poland China, Hungary Europe Sat. ASTRA Korea Japan USA, Argentina USA, Europe FM-Mono/NICAM AM-Mono/NICAM FM-Mono/NICAM FM-Stereo (A2, D/K1) FM-Stereo (A2, D/K2) PAL SECAM-L PAL SECAM-East PAL Scandinavia, Spain France UK, Hong Kong Slovak. Rep. currently no broadcast Position of Sound Carrier /MHz 5.5/5.7421875 Sound Modulation FM-Stereo (A2) Color System PAL Broadcast e.g. in: Germany
3407
Satellite
PAL
FM-Stereo (A2) FM-FM (EIA-J) BTSC-Stereo + SAP FM-Stereo Radio
NTSC NTSC NTSC, PAL
All standards as above, but Mono demodulation only.
33
34 39 MHz
4.5 9 MHz
SAW Filter Tuner Sound IF Mixer
1
Loudspeaker
Mono Vision Demodulator
MSP 34x7G
SCART Input
2
SCART1
2
SCART1
SCART Output
Composite Video
Fig. 1-2: Typical MSP 34x7G application
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Source Select
SCART DSP Input Select
SC1_IN_L SC1_IN_R
SCART Output Select
8
Standard Selection AGC ANA_IN1+ D A DEMODULATOR (incl. Carrier Mute) Deemphasis: 50/75 s, J17 DBX/MNR Panda1 FM/AM Prescale
(0Ehex)
2. Functional Description
MSP 34x7G
Automatic Sound Select
FM/AM
0 1 3
Stereo or A/B
Loudspeaker Channel Matrix
(08hex)
AVC
Volume
D A
DACM_L
DACM_R
(29hex)
(00hex)
Decoded Standards: - NICAM - A2 - AM - BTSC - EIA-J - SAT - FM-Radio
NICAM Deemphasis J17 Prescale
(10hex)
Stereo or A
Beeper
Stereo or B
4
(14hex)
Standard and Sound Detection
I2 C Read Register
Quasi-Peak Channel Matrix
(0Chex)
Quasi-Peak Detector
I2C Read Register
(19hex) (1Ahex)
A D
SCART 2 Prescale
(0Dhex)
SCART1 Channel Matrix
(0Ahex)
Volume
D SCART1_L/R A
(07hex)
SC1_OUT_L
SC1_OUT_R
(13hex)
PRELIMINARY DATA SHEET
MONO_IN
(13hex)
Fig. 2-1: Signal flow block diagram of the MSP 34x7G (input and output names correspond to pin names). Micronas
PRELIMINARY DATA SHEET
MSP 34x7G
BTSC-Mono + SAP: Detection and FM demodulation of the aural carrier resulting in the MTS/MPX signal. Detection and evaluation of the pilot carrier, detection and FM demodulation of the SAP-subcarrier. Processing of the DBX noise reduction or Micronas Noise Reduction (MNR). Japan Stereo: Detection and FM demodulation of the aural carrier resulting in the MPX signal. Demodulation and evaluation of the identification signal and FM demodulation of the (L-R)-carrier. FM-Satellite Sound: Demodulation of one or two FM carriers. Processing of high-deviation mono or narrow bandwidth mono, stereo, or bilingual satellite sound according to the ASTRA specification. FM-Stereo-Radio: Detection and FM demodulation of the aural carrier resulting in the MPX signal. Detection and evaluation of the pilot carrier and AM demodulation of the (L-R)-carrier. The demodulator blocks of all MSP 34x7G versions have identical user interfaces. Even completely different systems like the BTSC and NICAM systems are controlled the same way. Standards are selected by means of MSP Standard Codes. Automatic processes handle standard detection and identification without controller interaction. The key features of the MSP 34x7G demodulator blocks are Standard Selection: The controlling of the demodulator is minimized: All parameters, such as tuning frequencies or filter bandwidth, are adjusted automatically by transmitting one single value to the STANDARD SELECT register. For all standards, specific MSP standard codes are defined. Automatic Standard Detection: If the TV sound standard is unknown, the MSP 34x7G can automatically detect the actual standard, switch to that standard, and respond the actual MSP standard code. Automatic Carrier Mute: To prevent noise effects or FM identification problems in the absence of an FM carrier, the MSP 34x7G offers a configurable carrier mute feature, which is activated automatically if the TV sound standard is selected by means of the STANDARD SELECT register. If no FM carrier is detected at one of the two MSP demodulator channels, the corresponding demodulator output is muted. This is indicated in the STATUS register.
2.1. Architecture of the MSP 34x7G Family Fig. 2-1 on page 8 shows a simplified block diagram of the IC. The block diagram contains all features of the MSP 3457G. Other members of the MSP 34x7G family do not have the complete set of features: The demodulator handles only a subset of the standards presented in the demodulator block; NICAM processing is only possible in the MSP 3417G and MSP 3457G (see dashed block in Fig. 2-1).
2.2. Sound IF Processing 2.2.1. Analog Sound IF Input The input pins ANA_IN1+ and ANA_IN- offer the possibility to connect sound IF (SIF) sources to the MSP 34x7G. The analog-to-digital conversion of the sound IF signal is done by an A/D-converter. An analog automatic gain circuit (AGC) allows a wide range of input levels. The high-pass filter formed by the coupling capacitor at pin ANA_IN1+ (see Section 7. "Appendix D: Application Information" on page 77) is sufficient in most cases to suppress video components. Some combinations of SAW filters and sound IF mixer ICs, however, show large picture components on their outputs. In this case, further filtering is recommended.
2.2.2. Demodulator: Standards and Features The MSP 34x7G is able to demodulate all TV sound standards worldwide including the digital NICAM system. Depending on the MSP 34x7G version, the following demodulation modes can be performed: A2-Systems: Detection and demodulation of two separate FM carriers (FM1 and FM2), demodulation and evaluation of the identification signal of carrier FM2. NICAM-Systems: Demodulation and decoding of the NICAM carrier, detection and demodulation of the analog (FM or AM) carrier. For D/K-NICAM, the FM carrier may have a maximum deviation of 384 kHz. Very high deviation FM-Mono: Detection and robust demodulation of one FM carrier with a maximum deviation of 540 kHz. BTSC-Stereo: Detection and FM demodulation of the aural carrier resulting in the MTS/MPX signal. Detection and evaluation of the pilot carrier, AM demodulation of the (L-R)-carrier and detection of the SAP subcarrier. Processing of the DBX noise reduction or Micronas Noise Reduction (MNR).
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2.2.3. Preprocessing of Demodulator Signals The NICAM signals must be processed by a deemphasis filter and adjusted in level. The analog demodulated signals must be processed by a deemphasis filter, adjusted in level, and dematrixed. The correct deemphasis filters are already selected by setting the standard in the STANDARD SELECT register. The level adjustment has to be done by means of the FM/ AM and NICAM prescale registers. The necessary dematrix function depends on the selected sound standard and the actual broadcasted sound mode (mono, stereo, or bilingual). It can be manually set by the FM Matrix Mode register or automatically by the Automatic Sound Selection.
PRELIMINARY DATA SHEET
- "Stereo or A" channel: Analog or digital mono sound, stereo if available. In case of bilingual broadcast, it contains language A (on left and right). - "Stereo or B" channel: Analog or digital mono sound, stereo if available. In case of bilingual broadcast, it contains language B (on left and right). Fig. 2-2 and Table 2-2 show the source channel assignment of the demodulated signals in case of Automatic Sound Select mode for all sound standards. Note: The analog primary input channel contains the signal of the mono FM/AM carrier or the L+R signal of the MPX carrier. The secondary input channel contains the signal of the 2nd FM carrier, the L-R signal of the MPX carrier, or the SAP signal.
2.2.4. Automatic Sound Select In the Automatic Sound Select mode, the dematrix function is automatically selected based on the identification information in the STATUS register. No I2C interaction is necessary when the broadcasted sound mode changes (e.g. from mono to stereo). The demodulator supports the identification check by switching between mono-compatible standards (standards that have the same FM-Mono carrier) automatically and non-audible. If B/G-FM or B/G-NICAM is selected, the MSP will switch between these standards. The same action is performed for the standards: D/K1-FM, D/K2-FM, D/K3-FM and D/K-NICAM. Switching is only done in the absence of any stereo or bilingual identification. If identification is found, the MSP keeps the detected standard. In case of high bit-error rates, the MSP 34x7G automatically falls back from digital NICAM sound to analog FM or AM mono. Table 2-1 summarizes all actions that take place when Automatic Sound Select is switched on.
primary channel primary channel secondary channel
FM/AM Prescale
FM/AM
0
LS Ch. Matrix Source Select
NICAM A
NICAM
Automatic Sound Select
Stereo or A/B
1
Stereo or A
3
Output-Ch. matrices must be set once to stereo.
NICAM B
Prescale
Stereo or B
4
Fig. 2-2: Source channel assignment of demodulated signals in Automatic Sound Select Mode
2.2.5. Manual Mode Fig. 2-3 shows the source channel assignment of demodulated signals in case of manual mode. If manual mode is required, more information can be found in Section 6.7. "Demodulator Source Channels in Manual Mode" on page 75.
FM/AM FM-Matrix
FM/AM 0
LS Ch. Matrix Source Select
To provide more flexibility, the Automatic Sound Select block prepares four different source channels of demodulated sound (Fig. 2-2). By choosing one of the four demodulator channels, the preferred sound mode can be selected for each of the output channels (loudspeaker, headphone, etc.). This is done by means of the Source Select registers. The following source channels of demodulated sound are defined: - "FM/AM" channel: Analog mono sound, stereo if available. In case of NICAM, analog mono only (FM or AM mono). - "Stereo or A/B" channel: Analog or digital mono sound, stereo if available. In case of bilingual broadcast, it contains both languages A (left) and B (right).
secondary channel
Prescale
NICAM A
NICAM
NICAM (Stereo or A/B) 1
Output-Ch. matrices must be set according to the standard.
NICAM B
Prescale
Fig. 2-3: Source channel assignment of demodulated signals in Manual Mode
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PRELIMINARY DATA SHEET
MSP 34x7G
Table 2-1: Performed actions of the Automatic Sound Selection
Selected TV Sound Standard B/G-FM, D/K-FM, M-Korea, and M-Japan B/G-NICAM, L-NICAM, I-NICAM, D/K-NICAM Performed Actions Evaluation of the identification signal and automatic switching to mono, stereo, or bilingual. Preparing four demodulator source channels according to Table 2-2. Evaluation of NICAM-C-bits and automatic switching to mono, stereo, or bilingual. Preparing four demodulator source channels according to Table 2-2. In case of bad or no NICAM reception, the MSP switches automatically to FM/AM mono and switches back to NICAM if possible. A hysteresis prevents periodical switching. B/G-FM, B/G-NICAM or D/K1-FM, D/K2-FM, D/K3-FM, and D/K-NICAM Automatic searching for stereo/bilingual-identification in case of mono transmission. Automatic and nonaudible changes between Dual-FM and FM-NICAM standards while listening to the basic FM-mono sound carrier. Example: If starting with B/G-FM-Stereo, there will be a periodical alternation to B/G-NICAM in the absence of FM-Stereo/Bilingual or NICAM-identification. Once an identification is detected, the MSP keeps the corresponding standard. Evaluation of the pilot signal and automatic switching to mono or stereo. Preparing four demodulator source channels according to Table 2-2. Detection of the SAP carrier. In the absence of SAP, the MSP switches to BTSC-stereo if available. If SAP is detected, the MSP switches automatically to SAP (see Table 2-2).
BTSC-STEREO, FM Radio M-BTSC-SAP
Table 2-2: Sound modes for the demodulator source channels with Automatic Sound Select
Source Channels in Automatic Sound Select Mode Broadcasted Sound Standard M-Korea B/G-FM D/K-FM M-Japan Selected MSP Standard Code3) 02 03, 081) 04, 05, 07, 0B1) 30 Broadcasted Sound Mode MONO STEREO BILINGUAL: Languages A and B B/G-NICAM L-NICAM I-NICAM D/K-NICAM D/K-NICAM
(with high deviation FM)
FM/AM
(source select: 0)
Stereo or A/B
(source select: 1)
Stereo or A
(source select: 3)
Stereo or B
(source select: 4)
Mono Stereo Right = B analog Mono analog Mono analog Mono analog Mono Mono Stereo Mono Stereo Left = Mono Right = SAP Left = Mono Right = SAP Mono Stereo
Mono Stereo Left = A Right = B analog Mono NICAM Mono NICAM Stereo Left = NICAM A Right = NICAM B Mono Stereo Mono Stereo Left = Mono Right = SAP Left = Mono Right = SAP Mono Stereo
Mono Stereo A analog Mono NICAM Mono NICAM Stereo NICAM A Mono Stereo Mono Stereo Mono Mono Mono Stereo
Mono Stereo B analog Mono NICAM Mono NICAM Stereo NICAM B Mono Stereo Mono Stereo SAP SAP Mono Stereo
08, 032) 09 0A 0B, 042), 052) 0C, 0D
NICAM not available or error rate too high MONO STEREO BILINGUAL: Languages A and B
20, 21
MONO STEREO
20 BTSC 21
MONO + SAP STEREO + SAP MONO + SAP STEREO + SAP
FM Radio
40
MONO STEREO
1) 2) 3)
The Automatic Sound Select process will automatically switch to the mono compatible analog standard. The Automatic Sound Select process will automatically switch to the mono compatible digital standard. The MSP Standard Codes are defined in Table 3-7 on page 18.
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2.3. Preprocessing for SCART The SCART input need only be adjusted in level by means of the SCART prescale register.
PRELIMINARY DATA SHEET
2.5. Audio Baseband Processing 2.5.1. Automatic Volume Correction (AVC) Different sound sources (e.g. terrestrial channels, SAT channels, or SCART) fairly often do not have the same volume level. Advertisements during movies usually have a higher volume level than the movie itself. This results in annoying volume changes. The AVC solves this problem by equalizing the volume level. To prevent clipping, the AVC's gain decreases quickly in dynamic boost conditions. To suppress oscillation effects, the gain increases rather slowly for low level inputs. The decay time is programmable by means of the AVC register (see page 27). For input signals ranging from -24 dBr to 0 dBr, the AVC maintains a fixed output level of -18 dBr. Fig. 2-4 shows the AVC output level versus its input level. For prescale and volume registers set to 0 dB, a level of 0 dBr corresponds to full scale input/output. This is - SCART input/output 0 dBr = 2.0 Vrms - Loudspeaker output 0 dBr = 1.4 Vrms output level [dBr]
-18 -24 -30 -24 -18 -12 -6
2.4. Source Selection and Output Channel Matrix The Source Selector makes it possible to distribute all source signals (one of the demodulator source channels or SCART) to the desired output channels (loudspeaker, etc.). All input and output signals can be processed simultaneously. Each source channel is identified by a unique source address. For each output channel, the sound mode can be set to sound A, sound B, stereo, or mono by means of the output channel matrix. If Automatic Sound Select is on, the output channel matrix can stay fixed to stereo (transparent) for demodulated signals.
0
input level [dBr]
Fig. 2-4: Simplified AVC characteristics
2.5.2. Quasi-Peak Detector The quasi-peak readout register can be used to read out the quasi-peak level of any input source. The feature is based on following filter time constants: attack time: 1.3 ms decay time: 37 ms
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PRELIMINARY DATA SHEET
MSP 34x7G
2.7. Digital Control I/O Pins and Status Change Indication The static level of the digital input/output pins D_CTR_I/O_0/1 is switchable between HIGH and LOW via the I2C-bus by means of the ACB register (see page 28). This enables the controlling of external hardware switches or other devices via I2C-bus. The digital input/output pins can be set to high impedance by means of the MODUS register (see page 21). In this mode, the pins can be used as input. The current state can be read out of the STATUS register (see page 22). Optionally, the pin D_CTR_I/O_1 can be used as an interrupt request signal to the controller, indicating any changes in the read register STATUS. This makes polling unnecessary; I2C-bus interactions are reduced to a minimum (see STATUS register on page 22 and MODUS register on page 21).
2.6. SCART Signal Routing 2.6.1. SCART DSP In and SCART Out Select The SCART DSP Input Select and SCART Output Select blocks include switching facilities. The switches are controlled by the ACB user register (see page 28).
2.6.2. Stand-by Mode If the MSP 34x7G is switched off by first pulling STANDBYQ low and then (after >1 s delay) switching off DVSUP and AVSUP, but keeping AHVSUP (`Stand-by'-mode), the SCART switches maintain their position and function. This allows the copying from SCART-input to SCART-output in the TV set's stand-by mode. In case of power on or starting from stand-by (switching on the DVSUP and AVSUP, RESETQ going high 2 ms later), all internal registers except the ACB register (page 28) are reset to the default configuration (see Table 3-5 on page 17). The reset position of the ACB register becomes active after the first I2C transmission into the Baseband Processing part. By transmitting the ACB register first, the reset state can be redefined.
2.8. Clock PLL Oscillator and Crystal Specifications The MSP 34x7G derives all internal system clocks from the 18.432-MHz oscillator. In NICAM mode, the clock is phase-locked to the corresponding source. For proper performance, the MSP clock oscillator requires a 18.432-MHz crystal. Note, that for the phase-locked mode (NICAM), crystals with tighter tolerance are required.
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3. Control Interface 3.1. I2C Bus Interface The MSP 34x7G is controlled via the I2C bus slave interface. The IC is selected by transmitting one of the MSP 34x7G device addresses. In order to allow up to three MSP ICs to be connected to a single bus, an address select pin (ADR_SEL) has been implemented. With ADR_SEL pulled to high, low, or left open, the MSP 34x7G responds to different device addresses. A device address pair is defined as a write address and a read address (see Table 3-1). Writing is done by sending the write device address, followed by the subaddress byte, two address bytes, and two data bytes. Reading is done by sending the write device address, followed by the subaddress byte and two address bytes. Without sending a stop condition, reading of the addressed data is completed by sending the device read address and reading two bytes of data. Refer to Section 3.1.3. for the I2C bus protocol and to Section 3.4. "Programming Tips" on page 30 for proposals of MSP 34x7G I2C telegrams. See Table 3-2 for a list of available subaddresses. Besides the possibility of hardware reset, the MSP can also be reset by means of the RESET bit in the CONTROL register by the controller via I2C bus. Due to the architecture of the MSP 34x7G, the IC cannot react immediately to an I2C request. The typical Table 3-1: I2C Bus Device Addresses
ADR_SEL Mode MSP device address Low (connected to DVSS) Write 80hex Read 81hex High (connected to DVSUP) Write 84hex Read 85hex
PRELIMINARY DATA SHEET
response time is about 0.3 ms. If the MSP cannot accept another byte of data (e.g. while servicing an internal interrupt), it holds the clock line I2C_CL low to force the transmitter into a wait state. The I2C Bus Master must read back the clock line to detect when the MSP is ready to receive the next I2C transmission. The positions within a transmission where this may happen are indicated by 'Wait' in Section 3.1.3. The maximum wait period of the MSP during normal operation mode is less than 1 ms.
3.1.1. Internal Hardware Error Handling In case of any hardware problems (e.g. interruption of the power supply of the MSP), the MSP's wait period is extended to 1.8 ms. After this time period elapses, the MSP releases data and clock lines.
Indication and solving the error status: To indicate the error status, the remaining acknowledge bits of the actual I2C-protocol will be left high. Additionally, bit[14] of CONTROL is set to one. The MSP can then be reset via the I2C bus by transmitting the RESET condition to CONTROL.
Indication of reset: Any reset, even caused by an unstable reset line etc., is indicated in bit[15] of CONTROL. A general timing diagram of the I2C bus is shown in Fig. 4-21 on page 49.
Left Open Write 88hex Read 89hex
Table 3-2: I2C Bus Subaddresses
Name CONTROL WR_DEM RD_DEM WR_DSP RD_DSP Binary Value 0000 0000 0001 0000 0001 0001 0001 0010 0001 0011 Hex Value 00 10 11 12 13 Mode Read/Write Write Write Write Write Function Write: Software reset of MSP (see Table 3-3) Read: Hardware error status of MSP write address demodulator read address demodulator write address DSP read address DSP
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MSP 34x7G
3.1.2. Description of CONTROL Register
Table 3-3: CONTROL as a Write Register
Name CONTROL Subaddress 00hex Bit[15] (MSB) 1 : RESET 0 : normal Bits[14:0] 0
Table 3-4: CONTROL as a Read Register
Name CONTROL Subaddress 00hex %LW>@ 06% RESET status after last reading of CONTROL: 0 : no reset occured 1 : reset occured Bit>@ Internal hardware status: 0 : no error occured 1 : internal error occured BitV>@ not of interest
Reading of CONTROL will reset the bits[15,14] of CONTROL. After Power-on, bit[15] of CONTROL will be set; it must be read once to be reset.
3.1.3. Protocol Description Write to DSP or Demodulator
S Wait write device address ACK sub-addr ACK addr-byte ACK addr-byte ACK data-byte ACK data-byte ACK P high low high low
Read from DSP or Demodulator
S Wait write device address ACK sub-addr ACK addr-byte ACK addr-byte ACK S high low read device address Wait ACK data-byte- ACK data-byte NAK P high low
Write to Control Register
S Wait write device address ACK sub-addr ACK data-byte ACK data-byte ACK P high low
Read from Control Register
S Wait write device address ACK 00hex ACK S read device address Wait ACK data-byte- ACK data-byte NAK P high low
Note: S = P= ACK = NAK =
I2C-Bus Start Condition from master I2C-Bus Stop Condition from master Acknowledge-Bit: LOW on I2C_DA from slave (= MSP, light gray) or master (= controller, dark gray) Not Acknowledge-Bit: HIGH on I2C_DA from master (dark gray) to indicate `End of Read' or from MSP indicating internal error state Wait = I2C-Clock line is held low, while the MSP is processing the I2C command. This waiting time is max. 1 ms
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PRELIMINARY DATA SHEET
I2C_DA S I2C_CL
1 0 P
Fig. 3-1: I2C bus protocol (MSB first; data must be stable while clock is high)
3.1.4. Proposals for General MSP 34x7G I2C Telegrams 3.1.4.1. Symbols daw dar < > aa dd write device address (80hex, 84hex or 88hex) read device address (81hex, 85hex or 89hex) Start Condition Stop Condition Address Byte Data Byte
3.2. Start-Up Sequence: Power-Up and I2C-Controlling After POWER-ON or RESET (see Fig. 4-20), the IC is in an inactive state. All registers are in the Reset position (see Table 3-5 and Table 3-6), the analog outputs are muted. The controller has to initialize all registers for which a non-default setting is necessary.
3.3. MSP 34x7G Programming Interface 3.3.1. User Registers Overview
3.1.4.2. Write Telegrams

write to CONTROL register write data into demodulator write data into DSP
3.1.4.3. Read Telegrams
read data from CONTROL register read data from demodulator read data from DSP

The MSP 34x7G is controlled by means of user registers. The complete list of all user registers are given in Table 3-5 and Table 3-6. The registers are partitioned into the Demodulator section (Subaddress 10hex for writing, 11hex for reading) and the Baseband Processing sections (Subaddress 12hex for writing, 13hex for reading). Write and read registers are 16 bit wide, whereby the MSB is denoted bit[15]. Transmissions via I2C bus have to take place in 16-bit words (two byte transfers, with the most significant byte transferred first). All write registers, except the demodulator write registers are readable. Unused parts of the 16-bit write registers must be zero. Addresses not given in this table must not be accessed. For reasons of software compatibility to the MSP 34xxD, a Manual/Compatibility Mode is available. More read and write registers together with a detailed description can be found in "Appendix B: Manual/Compatibility Mode" on page 61.
3.1.4.4. Examples
<80 <80 <80 <80 <80 00 00 10 11 12 80 00 00 02 00 00> RESET MSP statically 00> Clear RESET 20 00 03> Set demodulator to stand. 03hex 00 <81 dd dd> Read STATUS 08 01 20> Set loudspeaker channel
source to NICAM and Matrix to STEREO
More examples of typical application protocols are listed in Section 3.4. "Programming Tips" on page 30.
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PRELIMINARY DATA SHEET
MSP 34x7G
.
Table 3-5: List of MSP 34x7G Write Registers
Write Register Address (hex) Bits Description and Adjustable Range Reset See Page
I2C Sub-Address = 10hex ; Registers are not readable STANDARD SELECT MODUS 00 20 00 30 [15:0] [15:0] Initial Programming of the Demodulator Demodulator, Automatic options 00 00 00 00 19 21
I2C Sub-Address = 12hex ; Registers are all readable by using I2C Sub-Address = 13hex Volume loudspeaker channel Volume / Mode loudspeaker channel 00 00 [15:8] [7:0] [+12 dB ... -114 dB, MUTE] 1/8 dB Steps, Reduce Volume / Tone Control / Compromise / Dynamic [+12 dB ... -114 dB, MUTE] [FM/AM, NICAM, SCART, I S1, I S2] [SOUNDA, SOUNDB, STEREO, MONO...] [FM/AM, NICAM, SCART, I2S1, I2S2]
2 2
MUTE 00hex
26
Volume SCART1 output channel Loudspeaker source select Loudspeaker channel matrix SCART1 source select SCART1 channel matrix Quasi-peak detector source select Quasi-peak detector matrix Prescale SCART input Prescale FM/AM FM matrix Prescale NICAM ACB : SCART Switches a. D_CTR_I/O Beeper Automatic Volume Correction
00 07 00 08
[15:8] [15:8] [7:0]
MUTE FM/AM SOUNDA FM/AM SOUNDA FM/AM SOUNDA 00hex 00hex NO_MAT 00hex 00hex 0/0 off
27 25 25 25 25 25 25 24 23 24 24 28 28 27
00 0A
[15:8] [7:0]
[SOUNDA, SOUNDB, STEREO, MONO...] [FM/AM, NICAM, SCART, I2S1, I2S2] [SOUNDA, SOUNDB, STEREO, MONO...] [00hex ... 7Fhex] [00hex ... 7Fhex] [NO_MAT, GSTERERO, KSTEREO] [00hex ... 7Fhex] (MSP 3417G, MSP 3457G only) Bits[15:0] [00hex ... 7Fhex]/[00hex ... 7Fhex] [off, on, decay time]
00 0C
[15:8] [7:0]
00 0D 00 0E
[15:8] [15:8] [7:0]
00 10 00 13 00 14 00 29
[15:8] [15:0] [15:0] [15:8]
Table 3-6: List of MSP 34x7G Read Registers
Read Register Address (hex) Bits Description and Adjustable Range See Page
I2C Sub-Address = 11hex ; Registers are not writable STANDARD RESULT STATUS 00 7E 02 00 [15:0] [15:0] Result of Automatic Standard Detection (see Table 3-8) Monitoring of internal settings e.g. Stereo, Mono, Mute etc. 22 22
I2C Sub-Address = 13hex ; Registers are not writable Quasi-peak readout left Quasi-peak readout right MSP hardware version code MSP major revision code MSP product code MSP ROM version code 00 1F 00 19 00 1A 00 1E [15:0] [15:0] [15:8] [7:0] [15:8] [7:0] [00hex ... 7FFFhex] 16 bit two's complement [00hex ... 7FFFhex] 16 bit two's complement [00hex ... FFhex] [00hex ... FFhex] [00hex ... FFhex] [00hex ... FFhex] 29 29 29 29 29 29
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3.3.2. Description of User Registers Table 3-7: Standard Codes for STANDARD SELECT register
MSP Standard Code (Data in hex) TV Sound Standard Automatic Standard Detection 00 01 Starts Automatic Standard Detection and sets detected standard Standard Selection 00 02 00 03 00 04 00 05 00 06 M-Dual FM-Stereo B/G-Dual FM-Stereo1) 4.5/4.724212 5.5/5.7421875 6.5/6.2578125 6.5/6.7421875
3)
PRELIMINARY DATA SHEET
Sound Carrier Frequencies in MHz
MSP 34x7G Version
all
3407, -17, -27, -47, -57 3407, -17, -57
D/K1-Dual FM-Stereo2) D/K2-Dual FM-Stereo2) D/K -FM-Mono with HDEV3 , not detectable by Automatic Standard Detection, for China HDEV33) SAT-Mono (i.e. Eutelsat, s. Table 6-18)
6.5
00 07 00 08 00 09 00 0A 00 0B 00 0C 00 0D 00 20 00 21 00 30 00 40 00 50 00 51
1) 2) 3) 4)
D/K3-Dual FM-Stereo B/G-NICAM-FM L-NICAM-AM I-NICAM-FM D/K-NICAM-FM 2) D/K-NICAM-FM with HDEV24), not detectable by Automatic Standard Detection, for China D/K-NICAM-FM with HDEV33), not detectable by Automatic Standard Detection, for China BTSC-Stereo BTSC-Mono + SAP M-EIA-J Japan Stereo FM-Stereo Radio with 75 s Deemphasis SAT-Mono (see Table 6-18) SAT-Stereo (see Table 6-18)
1)
6.5/5.7421875 5.5/5.85 6.5/5.85 6.0/6.552 6.5/5.85 6.5/5.85 6.5/5.85 4.5 3427, -47, -57 3417, -57
4.5 10.7 6.5 7.02/7.20
3427, -47, -57 3427, -47, -57 3407, -17, -57
In case of Automatic Sound Select, the B/G-codes 3hex and 8hex are equivalent. In case of Automatic Sound Select, the D/K-codes 4hex, 5hex, 7hex, and Bhex are equivalent. HDEV3: Max. FM deviation must not exceed 540 kHz HDEV2: Max. FM deviation must not exceed 360 kHz
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PRELIMINARY DATA SHEET
MSP 34x7G
3.3.2.2. Refresh of STANDARD SELECT Register A general refresh of the STANDARD SELECT register is not allowed. However, the following method enables watching the MSP 34x7G "alive" status and detection of accidental resets (only versions B6 and later): - After Power-on, bit[15] of CONTROL will be set; it must be read once to enable the reset-detection feature. - Reading of the CONTROL register and checking the reset indicator bit[15] . - If bit[15] is "0", any refresh of the STANDARD SELECT register is not allowed. - If bit[15] is "1", indicating a reset, a refresh of the STANDARD SELECT register and all other MSPG registers is required.
3.3.2.1. STANDARD SELECT Register The TV sound standard of the MSP 34x7G demodulator is determined by the STANDARD SELECT register. There are two ways to use the STANDARD SELECT register: - Setting up the demodulator for a TV sound standard by sending the corresponding standard code with a single I2C bus transmission. - Starting the Automatic Standard Detection for terrestrial TV standards. This is the most comfortable way to set up the demodulator. Within 0.5 s, the detection and setup of the actual TV sound standard is performed. The detected standard can be read out of the STANDARD RESULT register by the control processor. This feature is recommended for the primary setup of a TV set. Outputs should be muted during Automatic Standard Detection. The Standard Codes are listed in Table 3-7.
3.3.2.3. STANDARD RESULT Register Selecting a TV sound standard via the STANDARD SELECT register initializes the demodulator. This includes: AGC-settings and carrier mute, tuning frequencies, FIR-filter settings, demodulation mode (FM, AM, NICAM), deemphasis and identification mode. TV stereo sound standards that are unavailable for a specific MSP version are processed in analog mono sound of the standard. In that case, stereo or bilingual processing will not be possible. For a complete setup of the TV sound processing from analog IF input to the source selection, the transmissions as shown in Section 3.5. are necessary. For reasons of software compatibility to the MSP 34x7D, a Manual/Compatibility mode is available. A detailed description of this mode can be found on page 61. If Automatic Standard Detection is selected in the STANDARD SELECT register, status and result of the Automatic Standard Detection process can be read out of the STANDARD RESULT register. The possible results are based on the mentioned Standard Code and are listed in Table 3-8. In cases where no sound standard has been detected (no standard present, too much noise, strong interferers, etc.) the STANDARD RESULT register contains 00 00hex. In that case, the controller has to start further actions (for example set the standard according to a preference list or by manual input). As long as the STANDARD RESULT register contains a value greater than 07 FFhex, the Automatic Standard Detection is still active. During this period, the MODUS and STANDARD SELECT register must not be written. The STATUS register will be updated when the Automatic Standard Detection has finished. If a present sound standard is unavailable for a specific MSP-version, it detects and switches to the analog mono sound of this standard. Example: The MSPs 3427G and 3447G will detect a B/G-NICAM signal as standard 3 and will switch to the analog FMMono sound.
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Table 3-8: Results of the Automatic Standard Detection
Broadcasted Sound Standard Automatic Standard Detection could not find a sound standard B/G-FM B/G-NICAM I FM-Radio M-Korea M-Japan M-BTSC STANDARD RESULT Register Read 007Ehex 0000hex
PRELIMINARY DATA SHEET
0003hex 0008hex 000Ahex 0040hex 0002hex (if MODUS[14,13]=00) 0020hex (if MODUS[14,13]=01) 0030hex (if MODUS[14,13]=10)
L-AM D/K1 D/K2 D/K3 L-NICAM D/K-NICAM Automatic Standard Detection still active
0009hex (if MODUS[12]=0) 0004hex (if MODUS[12]=1) 0009hex (if MODUS[12]=0) 000Bhex (if MODUS[12]=1) >07FFhex
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MSP 34x7G
3.3.2.4. Write Registers on I2C Subaddress 10hex Table 3-9: Write registers on I2C subaddress 10hex Register Address 00 20hex Function STANDARD SELECTION Register Defines TV-Sound or FM-Radio Standard bit[15:0] 00 01hex 00 02hex ... 00 51hex start Automatic Standard Detection MSP Standard Codes (see Table 3-7) Name STANDARD_SEL
00 30hex
MODUS Register Preference in Automatic Standard Detection: bit[15] bit[14:13] 0 1 2 3 bit[12] 0 1 0 undefined, must be 0 detected 4.5 MHz carrier is interpreted as:1) standard M (Korea) standard M (BTSC) standard M (Japan) chroma carrier (M/N standards are ignored) detected 6.5 MHz carrier is interpreted as:1) standard L (SECAM) standard D/K1, D/K2, D/K3, or D/K NICAM
MODUS
General MSP 34x7G Options bit[11:4] bit[3] 0 0 undefined, must be 0 state of digital output pins D_CTR_I/O_0 and _1 active: D_CTR_I/O_0 and _1 are output pins (can be set by means of the ACB register. see also: MODUS[1]) tristate: D_CTR_I/O_0 and _1 are input pins (level can be read out of STATUS[4,3]) undefined, must be 0 disable/enable STATUS change indication by means of the digital I/O pin D_CTR_I/O_1 Necessary condition: MODUS[3] = 0 (active) off/on: Automatic Sound Select
1 bit[2] bit[1] 0 0/1
bit[0]
1)
0/1
Valid at the next start of Automatic Standard Detection.
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3.3.2.5. Read Registers on I2C Subaddress 11hex Table 3-10: Read Registers on I2C Subaddress 11hex Register Address 00 7Ehex Function STANDARD RESULT Register Readback of the detected TV sound or FM-Radio Standard bit[15:0] 00 00hex Automatic Standard Detection could not find a sound standard MSP Standard Codes (see Table 3-8)
PRELIMINARY DATA SHEET
Name STANDARD_RES
00 02hex ... 00 40hex >07 FFhex Automatic Standard Detection still active 02 00hex STATUS Register
STATUS
Contains all user relevant internal information about the status of the MSP bit[15:10] bit[8] 0/1 undefined "1" indicates bilingual sound mode or SAP present (internally evaluated from received analog or digital identification signals) "1" indicates independent mono sound (only for NICAM) mono/stereo indication (internally evaluated from received analog or digital identification signals) analog sound standard (FM or AM) active this pattern will not occur digital sound (NICAM) available bad reception condition of digital sound (NICAM) due to: a. high error rate b. unimplemented sound code c. data transmission only low/high level of digital I/O pin D_CTR_I/O_1 low/high level of digital I/O pin D_CTR_I/O_0 detected secondary carrier (2nd A2 or SAP sub-carrier) no secondary carrier detected detected primary carrier (Mono or MPX carrier) no primary carrier detected undefined
bit[7] bit[6]
0/1 0/1
bit[5,9]
00 01 10 11
bit[4] bit[3] bit[2] bit[1] bit[0]
0/1 0/1 0 1 0 1
If STATUS change indication is activated by means of MODUS[1]: Each change in the STATUS register sets the digital I/O pin D_CTR_I/O_1 to high level. Reading the STATUS register resets D_CTR_I/O_1.
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PRELIMINARY DATA SHEET
MSP 34x7G
3.3.2.6. Write Registers on I2C Subaddress 12hex Table 3-11: Write Registers on I2C Subaddress 12hex Register Address Function Name
PREPROCESSING 00 0Ehex FM/AM Prescale bit[15:8] 00hex ... 7Fhex 00hex Defines the input prescale gain for the demodulated FM or AM signal off (RESET condition) PRE_FM
For all FM modes except satellite FM and AM-mode, the combinations of prescale value and FM deviation listed below lead to internal full scale. FM mode bit[15:8] 7Fhex 48hex 30hex 24hex 18hex 13hex 28 kHz FM deviation 50 kHz FM deviation 75 kHz FM deviation 100 kHz FM deviation 150 kHz FM deviation 180 kHz FM deviation (limit)
FM high deviation mode (HDEV2, MSP Standard Code = Chex) bit[15:8] 30hex 14hex 150 kHz FM deviation 360 kHz FM deviation (limit)
FM very high deviation mode (HDEV3, MSP Standard Code = 6hex and Dhex) bit[15:8] 20hex 1Ahex 450 kHz FM deviation 540 kHz FM deviation (limit)
Satellite FM with adaptive deemphasis bit[15:8] 10hex recommendation
AM mode (MSP Standard Code = 9hex) bit[15:8] 7Chex recommendation for SIF input levels from 0.1 Vpp to 0.8 Vpp (Due to the AGC being switched on, the AM-output level remains stable and independent of the actual SIF-level in the mentioned input range)
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Table 3-11: Write Registers on I2C Subaddress 12hex, continued Register Address
(continued)
PRELIMINARY DATA SHEET
Function FM Matrix Modes Defines the dematrix function for the demodulated FM signal bit[7:0] 00hex 01hex 02hex 03hex 04hex no matrix (used for bilingual and unmatrixed stereo sound) German stereo (Standard B/G) Korean stereo (also used for BTSC, EIA-J and FM Radio) sound A mono (left and right channel contain the mono sound of the FM/AM mono carrier) sound B mono
Name FM_MATRIX
00 0Ehex
In case of Automatic Sound Select = on, the FM Matrix Mode is set automatically. Writing to the FM/AM prescale register (00 0Ehex high part) is still allowed. In order not to disturb the automatic process, the low part of any I2C transmission to this register is ignored. Therefore, any FM-Matrix readback values may differ from data written previously. In case of Automatic Sound Select = off, the FM Matrix Mode must be set as shown in Table 6-17 of Appendix B. To enable a Forced Mono Mode set A2 THRESHOLD as described in Section 6.3.2.on page 65 00 10hex NICAM Prescale Defines the input prescale value for the digital NICAM signal bit[15:8] 00hex ... 7Fhex prescale gain examples: 00hex off 0 dB gain 20hex 9 dB gain (recommendation) 5Ahex 7Fhex +12 dB gain (maximum gain) 00 0Dhex SCART Input Prescale Defines the input prescale value for the analog SCART input signal bit[15:8] 00hex ... 7Fhex prescale gain examples: 00hex off (RESET condition) 19hex 0 dB gain (2 VRMS input leads to digital full scale) +14 dB gain (400 mVRMS input leads to digital full scale) 7Fhex PRE_SCART PRE_NICAM
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PRELIMINARY DATA SHEET
MSP 34x7G
Table 3-11: Write Registers on I2C Subaddress 12hex, continued Register Address Function Name
SOURCE SELECT AND OUTPUT CHANNEL MATRIX 00 08hex 00 0Ahex 00 0Chex Source for: Loudspeaker Output SCART1 DA Output Quasi-Peak Detector bit[15:8] 0 1 "FM/AM": demodulated FM or AM mono signal "Stereo or A/B": demodulator Stereo or A/B signal (in manual mode, this source is identical to the NICAM source in the MSP 3417D) "Stereo or A": demodulator Stereo Sound or Language A (only defined for Automatic Sound Select) "Stereo or B": demodulator Stereo Sound or Language B (only defined for Automatic Sound Select) SCART input SRC_MAIN SRC_SCART1 SRC_QPEAK
3 4 2
For demodulator sources, see Table 2-2. 00 08hex 00 0Ahex 00 0Chex Matrix Mode for: Loudspeaker Output SCART1 DA Output Quasi-Peak Detector bit[7:0] Sound A Mono (or Left Mono) (RESET condition) 00hex Sound B Mono (or Right Mono) 10hex Stereo (transparent mode) 20hex Mono (sum of left and right inputs divided by 2) 30hex special modes are available (see Section 6.5.1. on page 73) MAT_MAIN MAT_SCART1 MAT_QPEAK
In Automatic Sound Select mode, the demodulator source channels are set according to Table 2-2. Therefore, the matrix modes of the corresponding output channels should be set to "Stereo" (transparent).
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Table 3-11: Write Registers on I2C Subaddress 12hex, continued Register Address Function
PRELIMINARY DATA SHEET
Name
LOUDSPEAKER PROCESSING 00 00hex Volume Loudspeaker bit[15:8] volume table with 1 dB step size +12 dB (maximum volume) 7Fhex +11 dB 7Ehex ... 74hex +1 dB 0 dB 73hex -1 dB 72hex ... -113 dB 02hex -114 dB 01hex Mute (RESET condition) 00hex FFhex Fast Mute (needs about 75 ms until the signal is completely ramped down) higher resolution volume table +0 dB 0 +0.125 dB increase in addition to the volume table 1 ... 7 +0.875 dB increase in addition to the volume table 0 must be set to 0 VOL_MAIN
bit[7:5]
bit[4] bit[3:0]
clipping mode 0 reduce volume 1 reduce tone control 2 compromise 3 dynamic
With large scale input signals, positive volume settings may lead to signal clipping. The MSP 34x7G loudspeaker and headphone volume function is divided into a digital and an analog section. With Fast Mute, volume is reduced to mute position by digital volume only. Analog volume is not changed. This reduces any audible DC plops. To turn volume on again, the volume step that has been used before Fast Mute was activated must be transmitted. If the clipping mode is set to "reduce volume", the following rule is used: To prevent severe clipping effects with bass, treble, or equalizer boosts, the internal volume is automatically limited to a level where, in combination with either bass, treble, or equalizer setting, the amplification does not exceed 12 dB. If the clipping mode is "reduce tone control", the bass or treble value is reduced if amplification exceeds 12 dB. If the equalizer is switched on, the gain of those bands is reduced, where amplification together with volume exceeds 12 dB. If the clipping mode is "compromise", the bass or treble value and volume are reduced half and half if amplification exceeds 12 dB. If the equalizer is switched on, the gain of those bands is reduced half and half, where amplification together with volume exceeds 12 dB. If the clipping mode is "dynamic", volume is reduced automatically if the signal amplitudes would exceed -2 dBFS within the IC.
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PRELIMINARY DATA SHEET
MSP 34x7G
Table 3-11: Write Registers on I2C Subaddress 12hex, continued Register Address 00 29hex Function Automatic Volume Correction (AVC) Loudspeaker Channel bit[15:12] 00hex 08hex bit[11:8] 08hex 04hex 02hex 01hex AVC off (and reset internal variables) AVC on 8 sec decay time 4 sec decay time (recommended) 2 sec decay time 20 ms decay time (should be used for approx. 100 ms after channel change) AVC AVC_DECAY Name
SCART OUTPUT CHANNEL 00 07hex Volume SCART1 Output Channel bit[15:8] volume table with 1 dB step size +12 dB (maximum volume) 7Fhex +11 dB 7Ehex ... 74hex +1 dB 0 dB 73hex -1 dB 72hex ... -113 dB 02hex 01hex -114 dB Mute (RESET condition) 00hex higher resolution volume table 0 +0 dB +0.125 dB increase in addition to the volume table 1 ... 7 +0.875 dB increase in addition to the volume table 01hex this must be 01hex VOL_SCART1
bit[7:5]
bit[4:0]
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MSP 34x7G
Table 3-11: Write Registers on I2C Subaddress 12hex, continued Register Address Function
PRELIMINARY DATA SHEET
Name
SCART SWITCHES AND DIGITAL I/O PINS 00 13hex ACB Register Defines the level of the digital output pins and the position of the SCART switches bit[15] bit[14] bit[13:5] 0/1 0/1 low/high of digital output pin D_CTR_I/O_1 (MODUS[3]=0) low/high of digital output pin D_CTR_I/O_0 (MODUS[3]=0) ACB_REG
SCART DSP Input Select xxxx00xx0 SCART1 to DSP input (RESET position) xxxx01xx0 MONO to DSP input (Sound A Mono must be selected in the channel matrix mode for the corresponding output channels) xxxx11xx1 mute DSP input SCART1 Output Select xx00xxx0x undefined (RESET position) xx10xxx0x MONO input to SCART1 output xx11xxx0x SCART1 DA to SCART1 output xx01xxx1x SCART1 input to SCART1 output xx11xxx1x mute SCART1 output
bit[13:5]
The RESET position becomes active at the time of the first write transmission on the control bus to the audio processing part. By writing to the ACB register first, the RESET state can be redefined. BEEPER 00 14hex Beeper Volume and Frequency bit[15:8] Beeper Volume off 00hex 7Fhex maximum volume Beeper Frequency 01hex 16 Hz (lowest) 1 kHz 40hex 4 kHz FFhex BEEPER
bit[7:0]
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PRELIMINARY DATA SHEET
MSP 34x7G
3.3.2.7. Read Registers on I2C Subaddress 13hex Table 3-12: Read Registers on I2C Subaddress 13hex Register Address Function Name
QUASI-PEAK DETECTOR READOUT 00 19hex 00 1Ahex Quasi-Peak Detector Readout Left Quasi-Peak Detector Readout Right bit[15:0] 0hex ... 7FFFhex values are 16 bit two's complement (only positive) QPEAK_L QPEAK_R
MSP 34x7G VERSION READOUT REGISTERS 00 1Ehex MSP Hardware Version Code bit[15:8] 02hex MSP 34x7G - B8 MSP_HARD
A change in the hardware version code defines hardware optimizations that may have influence on the chip's behavior. The readout of this register is identical to the hardware version code in the chip's imprint. MSP Major Revision Code bit[7:0] 00 1Fhex 07hex MSP 34x7G - B8 MSP_PRODUCT MSP 3407G - B8 MSP 3417G - B8 MSP 3427G - B8 MSP 3447G - B8 MSP 3457G - B8 MSP 3467G - B8
MSP_REVISION
MSP Product Code bit[15:8] 07hex 11hex 1Bhex 2Fhex 39hex 43hex
By means of the MSP product code, the control processor is able to decide which TV sound standards have to be considered. MSP ROM Version Code bit[7:0] 46hex 48hex MSP 34x7G - B6 MSP 34x7G - B8 MSP_ROM
A change in the ROM version code defines internal software optimizations, that may have influence on the chip's behavior, e.g. new features may have been included. While a software change is intended to create no compatibility problems, customers that want to use the new functions can identify new MSP 34x7G versions according to this number. To avoid compatibility problems with MSP 3410B and MSP 34x7D, an offset of 40hex is added to the ROM version code of the chip's imprint.
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MSP 34x7G
3.4. Programming Tips This section describes the preferred method for initializing the MSP 34x7G. The initialization is grouped into three sections: - SCART Signal Path (analog signal path) - Demodulator - Output Channels See Fig. 2-1 on page 8 for a complete signal flow.
PRELIMINARY DATA SHEET
3.5. Examples of Minimum Initialization Codes Initialization of the MSP 34x7G according to these listings reproduces sound of the selected standard on the loudspeaker output. All numbers are hexadecimal. The examples have the following structure: 1. Perform an I2C controlled reset of the IC. 2. Write MODUS register (with Automatic Sound Select). 3. Set Source Selection for loudspeaker channel (with matrix set to STEREO). 4. Set Prescale (FM and/or NICAM and dummy FM matrix). 5. Write STANDARD SELECT register. 6. Set Volume loudspeaker channel to 0 dB.
SCART Signal Path 1. Select analog input for the SCART baseband processing (SCART DSP Input Select) by means of the ACB register. 2. Set preferred prescale for SCART. 3. Select the source for the analog SCART output by means of the ACB register.
3.5.1. B/G-FM (A2 or NICAM)
<80 00 80 00> <80 00 00 00> <80 10 00 30 20 03> <80 12 00 08 03 20> <80 12 00 0E 24 03> <80 12 00 10 5A 00> <80 10 00 20 00 03> or <80 10 00 20 00 08> <80 12 00 00 73 00> // Softreset // MODUS-Register: Automatic = on // Source Sel. = (St or A) & Ch. Matr. = St // FM/AM-Prescale = 24hex, FM-Matrix = MONO/SOUNDA // NICAM-Prescale = 5Ahex // Standard Select: A2 B/G or NICAM B/G
Demodulator For a complete setup of the TV sound processing from analog IF input to the source selection, the following steps must be performed: 1. Set MODUS register to the preferred mode and Sound IF input. 2. Set preferred prescale (FM and NICAM) values. 3. Write STANDARD SELECT register. 4. If Automatic Sound Select is not active: Choose FM matrix repeatedly according to the sound mode indicated in the STATUS register.
// Loudspeaker Volume 0 dB
3.5.2. BTSC-Stereo
<80 00 80 00> <80 00 00 00> <80 10 00 30 20 03> <80 12 00 08 03 20> // MODUS-Register: Automatic = on // Source Sel. = (St or A) & Ch. Matr. = St // FM/AM-Prescale = 24hex, FM-Matrix = Sound A Mono // Standard Select: BTSC-STEREO // Loudspeaker Volume 0 dB // Softreset
Output Channels 1. Select the source channel and matrix for each output channel. 2. Select volume for each output channel.
<80 12 00 0E 24 03> <80 10 00 20 00 20> <80 12 00 00 73 00>
3.5.3. BTSC-SAP with SAP at Loudspeaker Channel
<80 00 80 00> <80 00 00 00> <80 10 00 30 20 03> <80 12 00 08 03 20> <80 12 00 0E 24 03> <80 10 00 20 00 21> <80 12 00 00 73 00> // MODUS-Register: Automatic = on // Source Sel. = (St or A) & Ch. Matr. = St // FM/AM-Prescale = 24hex, FM-Matrix = Sound A Mono // Standard Select: BTSC-SAP // Loudspeaker Volume 0 dB // Softreset
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PRELIMINARY DATA SHEET
MSP 34x7G
3.5.4. FM-Stereo Radio
<80 00 80 00> <80 00 00 00> <80 10 00 30 20 03> <80 12 00 08 03 20> <80 12 00 0E 24 03> <80 10 00 20 00 40> <80 12 00 00 73 00> // MODUS-Register: Automatic = on // Source Sel. = (St or A) & Ch. Matr. = St // FM/AM-Prescale = 24hex, FM-Matrix = Sound A Mono // Standard Select: FM-STEREO-RADIO // Loudspeaker Volume 0 dB // Softreset
3.5.5. Automatic Standard Detection A detailed software flow diagram is shown in Fig. 3-2 on page 32.
<80 00 80 00> <80 00 00 00> <80 10 00 30 20 03> <80 12 00 08 03 20> <80 12 00 0E 24 03> <80 12 00 10 5A 00> <80 10 00 20 00 01> // MODUS-Register: Automatic = on // Source Sel. = (St or A) & Ch. Matr. = St // FM/AM-Prescale = 24hex, FM-Matrix = Sound A Mono // NICAM-Prescale = 5Ahex // Standard Select: Automatic Standard Detection // Softreset
// Wait till STANDARD RESULT contains a value 07FF // IF STANDARD RESULT contains 0000 // do some error handling // ELSE <80 12 00 00 73 00> // Loudspeaker Volume 0 dB
3.5.6. Software Flow for Interrupt driven STATUS Check A detailed software flow diagram is shown in Fig. 3-2 on page 32. If the D_CTR_I/O_1 pin of the MSP 34x7G is connected to an interrupt input pin of the controller, the following interrupt handler can be applied to be automatically called with each status change of the MSP 34x7G. The interrupt handler may adjust the TV display according to the new status information.
Interrupt Handler: <80 11 02 00 <81 dd dd> // Read STATUS // adjust TV-display with given status information // Return from Interrupt
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MSP 34x7G
PRELIMINARY DATA SHEET
:ULWH 02'86 5HJLVWHU:
@hyr
for the essential bits:
bdA2A AAAAAAAAAAA6hvpATqATryrpA2A
[1] = 1 Enable interrupt if STATUS changes [8] = 0 ANA_IN1+ is selected Define Preference for Automatic Standard Detection: [12] = 0 If 6.5 MHz, set SECAM-L [14:13] = 3 Ignore 4.5 MHz carrier
:ULWH 6285&( 6(/(&7 6HWWLQJV
@hyr)
set loudspeaker Source Select to "Stereo or A" set headphone Source Select to "Stereo or B" set SCART_Out Source Select to "Stereo or A/B" set Channel Matrix mode for all outputs to "Stereo"
Write FM/AM-Prescale Write NICAM-Prescale
:ULWH LQWR 67$1'$5' 6(/(&7 5HJLVWHU
(Start Automatic Standard Detection)
set previous standard or set standard manually according picture information
yes
Result = 0 ?
no expecting interrupt from MSP
,Q FDVH RI LQWHUUXSW IURP 063 WR FRQWUROOHU
Read STATUS
Adjust TV-Display
If bilingual, adjust Source Select setting if required
Fig. 3-2: Software flow diagram for a minimum demodulator setup for a European multistandard set applying the Automatic Sound Select feature
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PRELIMINARY DATA SHEET
MSP 34x7G
4. Specifications 4.1. Outline Dimensions
SPGS703000-1(P52)/1E
52
27
1
26
47.0 0.1
0.6 0.2 4.0 0.1
15.6 0.1 14 0.1
0.28 0.06
2.8 0.2
1 0.05 1.778 0.48 0.06 25 x 1.778 = 44.4 0.1
16.3 1
Fig. 4-1: 52-Pin Plastic Shrink Dual Inline Package (PSDIP52) Weight approximately 5.5 g Dimensions in mm
10 x 0.8 = 8 0.1 0.17 0.06 33 34 13.2 0.2 23 22 10 0.1 0.8 10 0.1 0.8
44 1 11 13.2 0.2
12
2.0 0.1 2.15 0.2 0.1
0.34 0.05
SPGS706000-5(P44)/1E
Fig. 4-2: 44-Pin Plastic Metric Quad Flat Pack (PMQFP44) Weight approximately 0.4 g Dimensions in mm
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MSP 34x7G
4.2. Pin Connections and Short Descriptions NC = not connected; leave vacant LV = if not used, leave vacant DVSS: if not used, connect to DVSS X = obligatory; connect as described in circuit diagram AHVSS: connect to AHVSS
PRELIMINARY DATA SHEET
Pin No.
PSDIP 52-pin PMQFP 44-pin
Pin Name
Type
Connection
(if not used)
Short Description
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 - 18 19 20 21 22 23 24
7 - 8 9 10 11 12 13 14 15 16 17 - - 18 19 - 20 21 - 22 23 24 25 26
TP NC D_CTR_I/O_1 D_CTR_I/O_0 ADR_SEL STANDBYQ I2C_CL I2C_DA TP TP TP TP TP TP TP_CO DVSUP DVSS DVSS TP NC RESETQ NC NC VREF2 DACM_R OUT IN OUT IN/OUT IN/OUT IN IN IN/OUT IN/OUT
LV LV LV LV X X X X LV LV LV LV LV LV LV X X X LV LV X LV LV X LV
Test pin Not connected D_CTR_I/O_1 D_CTR_I/O_0 I2C Bus address select Standby (low-active) I2C clock I2C data Test pin Test pin Test pin Test pin Test pin Test pin Test pin1) Digital power supply +5 V Digital ground Digital ground Test pin Not connected Power-on-reset Not connected Not connected Reference ground 2 high-voltage part Loudspeaker out, right
1) Use this pin to define the capacitor size at the crystal oscillator (see Section 4.6.2.4. on page 44).
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PRELIMINARY DATA SHEET
MSP 34x7G
Pin No.
PSDIP 52-pin PMQFP 44-pin
Pin Name
Type
Connection
(if not used)
Short Description
25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 - 41 42 43 44 45 46 47 48 49 50 51 52
27 - - 28 29 30 31 32 33 34 35 36 - - 37 38 39 40 41 42 43 44 1 2 3 - 4 5 6
DACM_L NC NC NC VREF1 SC1_OUT_R SC1_OUT_L NC AHVSUP CAPL_M AHVSS AGNDC NC NC NC NC NC SC1_IN_L SC1_IN_R VREFTOP MONO_IN AVSS AVSUP ANA_IN1+ ANA_IN- NC TESTEN XTAL_IN XTAL_OUT
OUT
LV LV LV LV X
Loudspeaker out, left Not connected Not connected Not connected Reference ground 1 high-voltage part SCART 1 output, right SCART 1 output, left Not connected Analog power supply +8.0 V Volume capacitor MAIN Analog ground Analog reference voltage high-voltage part Not connected Not connected Not connected Not connected Not connected SCART 1 input, left SCART 1 input, right Reference voltage IF A/D converter Mono input Analog ground Analog power supply +5 V IF input 1 IF common Not connected Test pin Crystal oscillator Crystal oscillator
OUT OUT
LV LV LV X X X X LV LV LV LV LV
IN IN
LV LV X
IN
LV X X
IN IN
LV LV LV
IN IN OUT
X X X
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MSP 34x7G
4.3. Pin Descriptions NC - Pin not connected I2C_CL - I2C Clock Input/Output (Fig. 4-12) Via this pin the I2C bus clock signal has to be supplied. The signal can be pulled down by the MSP in case of wait conditions. I2C_DA - I2C Data Input/Output (Fig. 4-12) Via this pin the I2C bus data is written to or read from the MSP. TP_CO - Clock Output Output of clock signal used in order to define capacitors at the crystal oscillator (see Section 4.6.2.4. on page 44). DVSUP* - Digital Supply Voltage Power supply for the digital circuitry of the MSP. Must be connected to a power supply. DVSS* - Digital Ground Ground connection for the digital circuitry of the MSP RESETQ - Reset Input (Fig. 4-5) In the steady state, high level is required. A low level resets the MSP 34x7G. VREF2 - Reference Ground 2 Reference analog ground. This pin must be connected separately to ground (AHVSS). VREF2 serves as a clean ground and should be used as the reference for analog connections to the loudspeaker outputs. DACM_R/L - Loudspeaker Outputs (Fig. 4-15) Output of the loudspeaker signal. A 1nF capacitor to AHVSS must be connected to these pins. The DC offset on these pins depends on the selected volume. VREF1 - Reference Ground 1 Reference analog ground. This pin must be connected separately to ground (AHVSS). VREF1 serves as a clean ground and should be used as the reference for analog connections to the SCART output. SC1_OUT_R/L - SCART1 Outputs (Fig. 4-16) Output of the SCART1 signal. Connections to these pins must use a 100 ohm series resistor and are intended to be AC coupled. AHVSUP* - Analog Power Supply High Voltage Power is supplied via this pin for the analog circuitry of the MSP (except IF input). This pin must be connected to the +8 V supply.
PRELIMINARY DATA SHEET
CAPLM - Volume Capacitor Loudspeakers (Fig. 4-18) A 10F capacitor to AHVSUP must be connected to this pin. It serves as smoothing filter for volume changes in order to suppress audible plops. The value of the capacitor can be lowered to 1F if faster response is required. The area encircled by the trace lines should be minimized, keep traces as short as possible. This input is sensitive for magnetic induction. AHVSS* - Ground for Analog Power Supply High Voltage Ground connection for the analog circuitry of the MSP (except IF input). AGNDC - Internal Analog Reference Voltage This pin serves as the internal ground connection for the analog circuitry (except IF input). It must be connected to the VREF pins with a 3.3 F and a 100 nF capacitor in parallel. This pins shows a DC level of typically 3.73 V. SC1_IN_L/R - SCART1 Inputs (Fig. 4-8) The analog input signal for SCART1 is fed to this pin. Analog input connection must be AC coupled. VREFTOP - Reference Voltage IF AD Converter (Fig. 4-10) Via this pin, the reference voltage for the IF AD converter is decoupled. It must be connected to AVSS pins with a 10F and a 100nF capacitor in parallel. Traces must be kept short. MONO_IN - Mono Input (Fig. 4-8) The analog mono input signal is fed to this pin. Analog input connection must be AC coupled. AVSS* - Ground for Analog Power Supply Voltage Ground connection for the analog IF input circuitry of the MSP. AVSUP* - Analog Power Supply Voltage Power is supplied via this pin for the analog IF input circuitry of the MSP. This pin must be connected to the +5 V supply. ANA_IN1+ - IF Input 1 (Fig. 4-10) The analog sound if signal is supplied to this pin. Inputs must be AC coupled. This pin is designed as symmetrical input: ANA_IN1+ is internally connected to one input of a symmetrical op amp, ANA_IN- to the other. ANA_IN- - IF Common (Fig. 4-10) This pin serves as a common reference for ANA_IN1+ input. TESTEN - Test Enable Pin (Fig. 4-6) This pin enables factory test modes. For normal operation it must be connected to ground.
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PRELIMINARY DATA SHEET
MSP 34x7G
XTAL_IN, XTAL_OUT - Crystal Input and Output Pins (Fig. 4-14) These pins are connected to an 18.432 MHz crystal oscillator which is digitally tuned by integrated shunt capacitances. An external clock can be fed into XTAL_IN. External capacitors at each crystal pin to ground (AVSS) are required. It should be verified by layout, that no supply current for the digital circuitry is flowing through the ground connection point. To adjust capacitors see Crystal Recommendations on page 44. D_CTR_I/O_1/0 - Digital Control Input/Output Pins (Fig. 4-13) General purpose input/output pins. Pin D_CTR_I/O_1 can be used as an interrupt request pin to the controller. ADR_SEL - I2C Bus Address Select (Fig. 4-11) This pin selects the device address for the MSP (see Table 3-1 on page 14). STANDBYQ - Standby In normal operation, this pin must be high. If the MSP 34x7G is switched to (`Standby'-mode), the SCART switches maintain their position and function (see Section 2.6.2.on page 13). * Application Note: All ground pins should be connected to one low-resistive ground plane. All supply pins should be connected separately with short and low-resistive lines to the power supply. Decoupling capacitors from DVSUP to DVSS, AVSUP to AVSS, and AHVSUP to AHVSS are recommended as closely as possible to these pins. Decoupling of DVSUP and DVSS is most important. We recommend using more than one capacitor. By choosing different values, the frequency range of active decoupling can be extended. In our application boards we use: 220 pF, 470 pF, 1.5 nF, and 10 F. The capacitor with the lowest value should be placed nearest to the DVSUP and DVSS pins.
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MSP 34x7G
4.4. Pin Configurations
PRELIMINARY DATA SHEET
NC TP NC D_CTR_I/O_1 D_CTR_I/O_0 ADR_SEL STANDBYQ I2C_CL I2C_DA TP TP TP TP TP TP TP_CO DVSUP DVSS TP NC RESETQ NC NC VERF2 DACM_R DACM_L NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 52 51 50 49 48 47 46 45 44 43 XTAL_OUT XTAL_IN TESTEN NC ANA_IN- ANA_IN1+ AVSUP AVSS MONO_IN VREFTOP SC1_IN_R SC1_IN_L NC NC NC NC AGNDC AHVSS CAPL_M AHVSUP NC SC1_OUT_L SC1_OUT_R VREF1 NC NC XTAL_OUT AVSUP ANA_IN1+ ANA_IN- TESTEN XTAL_IN TP STANDBYQ ADR_SEL D_CTR_I/O0 D_CTR_I/O1 CAPL_M AHVSS AGNDC NC NC NC SC1_IN_L SC1_IN_R VREFTOP MONO_IN AVSS 34 35 36 37 38 39 40 41 42 43 44 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 RESETQ TP DVSS DVSUP TP_CO TP TP TP TP I2C_DA I2C_CL AHVSUP SC1_OUT_L NC VREF1 SC1_OUT_R DACM_L DACM_R VREF2 NC NC
MSP 34x7G
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27
MSP 34x7G
17 16 15 14 13 12
Fig. 4-3: PSDIP52 package
Fig. 4-4: PMQFP44 package
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PRELIMINARY DATA SHEET
MSP 34x7G
4.5. Pin Circuits
ANA_IN1+
>300 k
A D
DVSS Fig. 4-5: Input Pin: RESETQ ANA_IN1- VREFTOP
AVSUP
200 k
Fig. 4-10: Input Pins: VREFTOP, ANA_IN1+, ANA_IN-
Fig. 4-6: Input Pin TESTEN
DVSUP
23 k
24 k
23 k
3.75 V
GND ADR_SEL Fig. 4-11: Input Pin: ADR_SEL
Fig. 4-7: Input Pin: MONO_IN
40 k
3.75 V
Fig. 4-8: Input Pins: SC1_IN_L/R
Fig. 4-9: Input Pin: STANDBYQ
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MSP 34x7G
PRELIMINARY DATA SHEET
AHVSUP N GND Fig. 4-12: Input/Output Pins: I2C_CL, I2C_DA
3.3 k 0...1.2 mA
Fig. 4-15: Output Pins: DACM_R/L DVSUP P N GND Fig. 4-13: Input/Output Pins: D_CTR_I/O_1, D_CTR_I/O_0
3.75 V
26 pF 120 k
300
Fig. 4-16: Output Pins: SC1_OUT_R/L P
3-30 pF
500 k
DVSUP N P N GND
3-30 pF
Fig. 4-14: Output/Input Pins: XTAL_IN, XTAL_OUT Fig. 4-17: Output Pin: TP_CO
0...2 V
Fig. 4-18: Capacitor Pin: CAPL_M
125 k
3.75 V
Fig. 4-19: AGNDC
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PRELIMINARY DATA SHEET
MSP 34x7G
4.6. Electrical Characteristics 4.6.1. Absolute Maximum Ratings Symbol TA TS VSUP1 VSUP2 VSUP3 dVSUP23 PTOT Parameter Ambient Operating Temperature Storage Temperature First Supply Voltage Second Supply Voltage Third Supply Voltage Voltage between AVSUP and DVSUP Package Power Dissipation PSDIP52 PMQFP44 Input Voltage, all Digital Inputs Input Current, all Digital Pins Input Voltage, all Analog Inputs Input Current, all Analog Inputs Output Current, all SCART Outputs Output Current, all Analog Outputs except SCART Outputs Output Current, other pins connected to capacitors - SC1_IN_s,2) MONO_IN SC1_IN_s,2) MONO_IN SC1_OUT_s2) DACM_s2) CAPL_M, AGNDC Pin Name - - AHVSUP DVSUP AVSUP AVSUP, DVSUP AHVSUP, DVSUP, AVSUP Min. 0 Max. 70 125 9.0 6.0 6.0 0.5 Unit
C C
V V V V
-40 -0.3 -0.3 -0.3 -0.5
1200 960
mW mW V mA1) V mA1)
VIdig IIdig VIana IIana IOana IOana ICana
1) 2) 3) 4)
-0.3 -20 -0.3 -5
3) 4)
VSUP2+0.3 +20 VSUP1+0.3 +5
3) 4)
,
,
3)
3)
3)
3)
positive value means current flowing into the circuit "s" means "L" or "R" The Analog Outputs are short-circuit proof with respect to First Supply Voltage and Ground. Total chip power dissipation must not exceed absolute maximum rating.
Stresses beyond those listed in the "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only. Functional operation of the device at these or any other conditions beyond those indicated in the "Recommended Operating Conditions/Characteristics" of this specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability.
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MSP 34x7G
4.6.2. Recommended Operating Conditions at TA = 0 to 70 C 4.6.2.1. General Recommended Operating Conditions Symbol VSUP1 Parameter First Supply Voltage (AHVSUP = 8 V) First Supply Voltage (AHVSUP = 5V) VSUP2 VSUP3 tSTBYQ1 Second Supply Voltage Third Supply Voltage STANDBYQ Setup Time before Turn-off of Second Supply Voltage DVSUP AVSUP STANDBYQ, DVSUP Pin Name AHVSUP Min. 7.6 4.75 4.75 4.75 1
PRELIMINARY DATA SHEET
Typ. 8.0 5.0 5.0 5.0
Max. 8.7 5.25 5.25 5.25
Unit V V V V
s
4.6.2.2. Analog Input and Output Recommendations Symbol CAGNDC Parameter AGNDC-Filter-Capacitor Ceramic Capacitor in Parallel CinSC VinSC VinMONO RLSC CLSC CVMA CFMA
1)
Pin Name AGNDC
Min.
Typ. 3.3 100 330
Max.
Unit
-20% -20%
F
nF nF 2.0 VRMS VRMS k 6.0 nF
DC-Decoupling Capacitor in front of SCART Inputs SCART Input Level Input Level, Mono Input SCART Load Resistance SCART Load Capacitance Main Volume Capacitor Main Filter Capacitor
SC1_IN_s1)
-20%
MONO_IN SC1_OUT_s1) 10
2.0
CAPL_M DACM_s1)
10
F +10%
nF
-10%
1
"s" means "L" or "R"
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PRELIMINARY DATA SHEET
MSP 34x7G
4.6.2.3. Recommendations for Analog Sound IF Input Signal Symbol CVREFTOP Parameter VREFTOP-Filter-Capacitor Ceramic Capacitor in Parallel FIF_FMTV FIF_FMRADIO VIF_FM VIF_AM RFMNI Analog Input Frequency Range for TV applications Analog Input Frequency for FM-Radio Applications Analog Input Range FM/NICAM Analog Input Range AM/NICAM Ratio: NICAM Carrier/FM Carrier (unmodulated carriers) BG: I: Ratio: NICAM Carrier/AM Carrier (unmodulated carriers) Ratio: FM-Main/FM-Sub Satellite Ratio: FM1/FM2 German FM-System Ratio: Main FM Carrier/ Color Carrier Ratio: Main FM Carrier/ Luma Components Passband Ripple Suppression of Spectrum above 9.0 MHz (not for FM Radio) Maximum FM-Deviation (approx.) normal mode HDEV2: high deviation mode HDEV3: very high deviation mode 15 15 - 15 0.1 0.1 ANA_IN1+, ANA_IN- Pin Name VREFTOP Min. Typ. 10 100 9 10.7 0.8 0.45 3 0.8 Max. Unit
-20% -20%
0
F
nF MHz MHz Vpp Vpp
-20 -23 -25
-7 -10 -11
7 7 - - -
0 0 0
dB dB dB dB dB
RAMNI RFM RFM1/FM2 RFC RFV PRIF SUPHF FMMAX
- -
dB dB dB dB
2
-
180 360 540
kHz kHz kHz
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4.6.2.4. Crystal Recommendations Symbol Parameter Pin Name Min.
PRELIMINARY DATA SHEET
Typ.
Max.
Unit
General Crystal Recommendations fP RR C0 CL Crystal Parallel Resonance Frequency at 12 pF Load Capacitance Crystal Series Resistance Crystal Shunt (Parallel) Capacitance External Load Capacitance1) XTAL_IN, XTAL_OUT PSDIP PMQFP 18.432 8 6.2 25 7.0 MHz
pF pF pF
approx. 1.5 approx. 3.3
Crystal Recommendations for FM / NICAM Applications fTOL DTEM C1 fCL
1)
Accuracy of Adjustment Frequency Variation versus Temperature Motional (Dynamic) Capacitance Required Open Loop Clock Frequency (Tamb = 25 C)
-30 -30
15
18.4305
+30 +30
ppm ppm fF
18.4335
MHz
External capacitors at each crystal pin to ground are required. They are necessary to tune the open-loop frequency of the internal PLL and to stabilize the frequency in closed-loop operation. Due to different layouts, the accurate capacitor value should be determined with the customer PCB. The suggested values (1.5...3.3 pF) are figures based on experience and should serve as "start value". To adjust the capacitor value, reset the MSP and transfer only the following I2C-protocol: <80 10 00 20 00 60>. Measure the frequency at pin TP_CO. Measurement at XTAL_IN/OUT pins is not possible. Change the capacitor value until the frequency matches 18.432/3 = 6.144 MHz as closely as possible. The higher the capacity, the lower the resulting clock frequency.
Note: To minimize adjustment tolerances for all MSP-generations, it is strongly recommended to use the socalled MSP-XTAL-REF ICs (available in all packages) for the capacitor adjustment. Since all MSP-XTAL-REF ICs do have an AUD_CL_OUT-pin with the 18.432 MHz signal, this pin should be used for the capacitor adjustment instead of the TP_CO-pin. After the reset, no I2C-protocol should be transmitted. The AUD_CL_OUT-signal is available at the following pins: PLCC68 pin 18
2)
PSDIP64 pin 1
PSDIP52 pin 2
PQFP80 pin 74
PLQFP64 pin 57
PMQFP442) pin 8
For the MSP-XTAL-REF IC, the PMQFP44 pin functionality of the D_CTR_I/O1-pin has been changed to the Audio_Clock_Out signal. If D_CTR_I/O1 is used in the customer application, this pin must be left open for the adjustment procedure.
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PRELIMINARY DATA SHEET
MSP 34x7G
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Crystal Recommendations for all analog FM/AM Applications fTOL DTEM fCL Accuracy of Adjustment Frequency Variation versus Temperature Required Open Loop Clock Frequency (Tamb = 25 C)
-100 -50
18.429
+100 +50
18.435
ppm ppm MHz
Amplitude Recommendation for Operation with External Clock Input (Cload after reset typ. 22 pF) VXCA External Clock Amplitude XTAL_IN 0.7 Vpp
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MSP 34x7G
4.6.3. Characteristics
PRELIMINARY DATA SHEET
at TA = 0 to 70 C, fCLOCK = 18.432 MHz, VSUP1 = 7.6 to 8.7 V, VSUP2 = 4.75 to 5.25 V for min./max. values at TA = 60 C, fCLOCK = 18.432 MHz, VSUP1 = 8 V, VSUP2 = 5 V for typical values, TJ = Junction Temperature MAIN (M) = Loudspeaker Channel
4.6.3.1. General Characteristics
Symbol Supply ISUP1A First Supply Current (active) (AHVSUP = 8 V) First Supply Current (active) (AHVSUP = 5 V) ISUP2A ISUP3A ISUP1S Second Supply Current (active) Third Supply Current (active) First Supply Current (AHVSUP = 8 V) First Supply Current (AHVSUP = 5 V) Clock fCLOCK DCLOCK tJITTER VxtalDC tStartup Clock Input Frequency Clock High to Low Ratio Clock Jitter (verification not provided in production test) DC-Voltage Oscillator Oscillator Startup Time at VDD Slew-rate of 1 V/1 s XTAL_IN, XTAL_OUT 2.5 0.4 2 XTAL_IN 45 18.432 55 50 MHz % ps DVSUP AVSUP AHVSUP AHVSUP 14 10 11 8 55 30 5.6 22 16 16 11 70 38 7.7 mA mA mA mA mA mA mA STANDBYQ = low Volume Main = 0 dB Volume Main = -30 dB Volume Main = 0 dB Volume Main = -30 dB Parameter Pin Name Min. Typ. Max. Unit Test Conditions
3.7
5.1
mA
STANDBYQ = low
V ms
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PRELIMINARY DATA SHEET
MSP 34x7G
4.6.3.2. Digital Inputs, Digital Outputs
Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions
Digital Input Levels VDIGIL VDIGIH ZDIGI IDLEAK VDIGIL VDIGIH IADRSEL Digital Input Low Voltage Digital Input High Voltage Input Impedance Digital Input Leakage Current STANDBYQ 0.5 5 0.2 VSUP2 VSUP2 pF
-1
1
A
0 V < UINPUT< DVSUP D_CTR_I/O_0/1: tri-state
Digital Input Low Voltage Digital Input High Voltage Input Current Address Select Pin
ADR_SEL 0.8
0.2
VSUP2 VSUP2
-500
-220
220 500 5
A A
pF
UADR_SEL = DVSS UADR_SEL = DVSUP
ZTESTEN ITESTEN
Input Capacitance Input Low Current
TESTEN
-30
A
UTESTEN = AVSS
Digital Output Levels VDCTROL VDCTROH Digital Output Low Voltage Digital Output High Voltage D_CTR_I/O_0 D_CTR_I/O_1 VSUP2 -0.3 0.4 V V IDDCTR = 1 mA IDDCTR = -1 mA
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4.6.3.3. Reset Input and Power-Up
Symbol Parameter Pin Name Min. Typ. Max.
PRELIMINARY DATA SHEET
Unit
Test Conditions
RESETQ Input Levels VRHL VRLH ZRES IRES Reset High-Low Transition Voltage Reset Low-High Transition Voltage Input Capacitance Input High Current RESETQ 0.3 0.45 0.4 0.55 5 20 VSUP2 VSUP2 pF
A
URESETQ = DVSUP
DVSUP AVSUP
4.5 V
t/ms
RESETQ
Low-to-High Threshold 0.45x DVSUP 0.3...0.4x DVSUP High-to-Low Threshold
Note: The reset should not reach high level before the oscillator has started. This requires a reset delay of >2 ms 0.45 x DVSUP means 2.25 Volt with DVSUP = 5.0 V t/ms
Reset Delay >2 ms
Internal Reset
High
Low
t/ms Fig. 4-20: Power-up sequence
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PRELIMINARY DATA SHEET
MSP 34x7G
4.6.3.4. I2C Bus Characteristics
Symbol VI2CIL VI2CIH tI2C1 tI2C2 tI2C5 tI2C6 tI2C3 tI2C4 fI2C VI2COL II2COH tI2COL1 tI2COL2 Parameter I2C-Bus Input Low Voltage I2C-Bus Input High Voltage I2C Start Condition Setup Time I C Stop Condition Setup Time I2C-Data Setup Time before Rising Edge of Clock I2C-Data Hold Time after Falling Edge of Clock I2C-Clock Low Pulse Time I2C-Clock High Pulse Time I2C-BUS Frequency I C-Data Output Low Voltage I2C-Data Output High Leakage Current I2C-Data Output Hold Time after Falling Edge of Clock I2C-Data Output Setup Time before Rising Edge of Clock 15
2 2
Pin Name I2C_CL, I2C_DA
Min.
Typ.
Max. 0.3
Unit VSUP2 VSUP2 ns ns ns
Test Conditions
0.6 120 120 55
55
ns
I2C_CL
500 500 1.0
ns ns MHz V II2COL = 3 mA VI2COH = 5 V
I2C_CL, I2C_DA
0.4 1.0
A
ns
100
ns
fI2C = 1 MHz
1/FI2C I2C_CL TI2C4 TI2C3
TI2C1 I2C_DA as input
TI2C5
TI2C6
TI2C2
TI2COL2 I2C_DA as output
TI2COL1
Fig. 4-21: I2C bus timing diagram
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4.6.3.5. Analog Baseband Inputs and Outputs, AGNDC
Symbol Parameter Pin Name Min. Typ. Max.
PRELIMINARY DATA SHEET
Unit
Test Conditions
Analog Ground VAGNDC0 AGNDC Open Circuit Voltage (AHVSUP = 8 V) AGNDC Open Circuit Voltage (AHVSUP = 5 V) RoutAGN AGNDC Output Resistance (AHVSUP = 8 V) AGNDC Output Resistance (AHVSUP = 5 V) Analog Input Resistance RinSC RinMONO SCART Input Resistance from TA = 0 to 70 C MONO Input Resistance from TA = 0 to 70 C SC1_IN_s1) 25 40 58 k fsignal = 1 kHz, I = 0.05 mA fsignal = 1 kHz, I = 0.1 mA 70 AGNDC 3.77 V Rload 10 M
2.51
V 3 V VAGNDC 4 V
125
180
k
47
83
120
k
MONO_IN
15
24
35
k
Audio Analog-to-Digital-Converter VAICL Analog Input Clipping Level for Analog-to-Digital-Conversion (AHVSUP = 8 V) Analog Input Clipping Level for Analog-to-Digital-Conversion (AHVSUP = 5 V) SCART Output RoutSC SCART Output Resistance SC1_OUT_s1) 200 200 Deviation of DC-Level at SCART Output from AGNDC Voltage Gain from Analog Input to SCART Output Frequency Response from Analog Input to SCART Output Signal Level at SCART Output (AHVSUP = 8 V) Signal Level at SCART Output (AHVSUP = 5V)
1)
SC1_IN_s,1) MONO_IN
2.00
2.25
VRMS
fsignal = 1 kHz
1.13
1.51
VRMS
330
460 500

mV
fsignal = 1 kHz, I = 0.1 mA Tj = 27 C TA = 0 to 70 C
dVOUTSC ASCtoSC frSCtoSC VoutSC
-70
SCn_IN_s,1) MONO_IN SC1_OUT_s1) SC1_OUT_s1)
+70 +0.5 +0.5
-1.0 -0.5
dB
fsignal = 1 kHz with resp. to 1 kHz Bandwidth: 0 to 20000 Hz fsignal = 1 kHz Volume 0 dB Full Scale input from I2S
dB
1.8
1.9
2.0
VRMS VRMS
1.17
1.27
1.37
"s" means "L" or "R"
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PRELIMINARY DATA SHEET
MSP 34x7G
Symbol Main Output RoutMA
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
Main Output Resistance
DACM_s1) 2.1 2.1 3.3 4.6 5.0 2.28 k k V mV V mV VRMS VRMS
fsignal = 1 kHz, I = 0.1 mA, Tj = 27 C TA = 0 to 70 C Volume Main = 0 dB Volume Main = -30 dB Volume Main = 0 dB Volume Main = -30 dB fsignal = 1 kHz, full scale, Volume Main = 0 dB
VoutDCMA
DC-Level at Main-Output (AHVSUP = 8 V) DC-Level at Main-Output (AHVSUP = 5 V)
1.80
2.04 61 1.36 40 1.37
1.12
1.60
VoutMA
Signal Level at Main-Output (AHVSUP = 8 V) Signal Level at Main-Output (AHVSUP = 5 V)
1.23
1.51
0.76
0.90
1.04
1)
"s" means "L" or "R"
4.6.3.6. Sound IF Input
Symbol RIFIN DCVREFTOP DCANA_IN XTALKIF BWIF AGC Parameter Input Impedance Pin Name ANA_IN1+, ANA_IN- VREFTOP ANA_IN1+, ANA_IN- ANA_IN1+, ANA_IN- Min. 1.5 6.8 2.4 1.3 Typ. 2 9.1 2.65 1.5 Max. 2.5 11.4 2.75 1.7 Unit k k V V Test Conditions Gain AGC = 20 dB Gain AGC = 3 dB
DC Voltage at VREFTOP DC Voltage on IF Inputs
Crosstalk Attenuation 3 dB Bandwidth AGC Step Width
40 10 0.85
dB MHz dB fsignal = 1 MHz Input Level = -2 dBr
4.6.3.7. Power Supply Rejection
Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions
PSRR: Rejection of Noise on AHVSUP at 1 kHz PSRR AGNDC From Analog Input to SCART Output
1)
AGNDC MONO_IN, SC1_IN_s1) SC1_OUT_s1)
80 70
dB dB
"s" means "L" or "R"
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MSP 34x7G
4.6.3.8. Analog Performance
Symbol Parameter Pin Name Min. Typ. Max.
PRELIMINARY DATA SHEET
Unit
Test Conditions
Specifications for AHVSUP = 8 V SNR Signal-to-Noise Ratio from Analog Input to SCART Output MONO_IN, SC1_IN_s1) SC1_OUT_s1) 93 96 dB Input Level = -20 dB, fsig = 1 kHz, unweighted 20 Hz...20 kHz
THD
Total Harmonic Distortion from Analog Input to SCART Output MONO_IN, SC1_IN_s SC1_OUT_s1) 0.01 0.03 % Input Level = -3 dBr, fsig = 1 kHz, unweighted 20 Hz...20 kHz
Specifications for AHVSUP = 5 V SNR Signal-to-Noise Ratio from Analog Input to SCART Output MONO_IN, SC1_IN_s1) SC1_OUT_s1) 90 93 dB Input Level = -20 dB, fsig = 1 kHz, unweighted 20 Hz...20 kHz
THD
Total Harmonic Distortion from Analog Input to SCART Output MONO_IN, SC1_IN_s SC1_OUT_s1) 0.1 % Input Level = -3 dBr, fsig = 1 kHz, unweighted 20 Hz...20 kHz
CROSSTALK Specifications for AHVSUP = 8 V and 5 V XTALK Crosstalk Attenuation Input Level = -3 dB, fsig = 1 kHz, unused analog inputs connected to ground by Z < 1 k unweighted 20 Hz...20 kHz 80 95 dB dB unweighted 20 Hz...20 kHz
between left and right channel within SCART Input/Output pair (LR, RL) SC1_IN SC1_OUT between MONO Input and SCART Input
1)
"s" means "L" or "R"
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PRELIMINARY DATA SHEET
MSP 34x7G
4.6.3.9. Sound Standard Dependent Characteristics
Symbol Parameter Pin Name Min. Typ. Max. Unit Test Conditions
NICAM Characteristics (MSP Standard Code = 8) dVNICAMOUT S/NNICAM Tolerance of Output Voltage of NICAM Baseband Signal S/N of NICAM Baseband Signal DACM_s, SC1_OUT_s1)
-1.5
+1.5
dB
2.12 kHz, Modulator input level = 0 dBref NICAM: -6 dB, 1 kHz, RMS unweighted 0 to 15 kHz, Vol = 9 dB NIC_Presc = 7Fhex Output level 1 VRMS at DACM_s 2.12 kHz, Modulator input level = 0 dBref FM+NICAM, norm conditions Modulator input level = -12 dB dBref; RMS
72
dB
THDNICAM BERNICAM fRNICAM XTALKNICAM SEPNICAM
Total Harmonic Distortion + Noise of NICAM Baseband Signal NICAM: Bit Error Rate NICAM Frequency Response, 20...15000 Hz NICAM Crosstalk Attenuation (Dual) NICAM Channel Separation (Stereo)
0.1
% 10-7 dB
1
-1.0
+1.0
80 80
dB dB
FM Characteristics (MSP Standard Code = 3) dVFMOUT S/NFM THDFM Tolerance of Output Voltage of FM Demodulated Signal S/N of FM Demodulated Signal Total Harmonic Distortion + Noise of FM Demodulated Signal DACM_s, SC1_OUT_s1)
-1.5
+1.5
dB
1 FM-carrier, 50 s, 1 kHz, 40 kHz deviation; RMS 1 FM-carrier 5.5 MHz, 50 s, 1 kHz, 40 kHz deviation; RMS, unweighted 0 to 15 kHz (for S/N); full input range, FM-Prescale = 46hex, Vol = 0 dB Output Level 1 VRMS at DACM_s 1 FM-carrier 5.5 MHz, 50 s, Modulator input level = -14.6 dBref; RMS 2 FM-carriers 5.5/5.74 MHz, 50 s, 1 kHz, 40 kHz deviation; Bandpass 1 kHz 2 FM-carriers 5.5/5.74 MHz, 50 s, 1 kHz, 40 kHz deviation; RMS
73 0.1
dB %
fRFM
FM Frequency Responses, 20...15000 Hz
-1.0
+1.0
dB
XTALKFM
FM Crosstalk Attenuation (Dual)
80
dB
SEPFM
FM Channel Separation (Stereo)
50
dB
AM Characteristics (MSP Standard Code = 9) S/NAM(1) S/NAM(2) THDAM fRAM S/N of AM Demodulated Signal measurement condition: RMS/Flat S/N of AM Demodulated Signal measurement condition: QP/CCIR Total Harmonic Distortion + Noise of AM Demodulated Signal AM Frequency Response 50...12000 Hz DACM_s, SC1_OUT_s1) 55 dB SIF level: 0.1-0.8 Vpp AM-carrier 54% at 6.5 MHz Vol = 0 dB, FM/AM prescaler set for output = 0.5 VRMS at Loudspeaker out; Standard Code = 09hex no video/chroma components
45
dB
0.6
%
-2.5
+1.0
dB
1) "s" means "L" or "R"
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MSP 34x7G
PRELIMINARY DATA SHEET
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
BTSC Characteristics (MSP Standard Code = 20hex, 21hex) S/NBTSC S/N of BTSC Stereo Signal S/N of BTSC-SAP Signal DACM_s, SC1_OUT_s1) 68 57 dB dB 1 kHz L or R or SAP, 100% modulation, 75 s deemphasis, RMS unweighted 0 to 15 kHz 1 kHz L or R or SAP, 100% 75 s EIM2), DBX NR or MNR, RMS unweighted 0 to 15 kHz L or R or SAP, 1%...66% EIM2), DBX NR
THDBTSC
THD+N of BTSC Stereo Signal THD+N of BTSC SAP Signal
0.1 0.5
% %
fRDBX
Frequency Response of BTSC Stereo, 50 Hz...12 kHz Frequency Response of BTSCSAP, 50 Hz...9 kHz
-1.0 -1.0 -2.0 -2.0
1.0 1.0
dB dB
fRMNR
Frequency Response of BTSC Stereo, 50 Hz...12 kHz Frequency Response of BTSCSAP, 50 Hz...9 kHz
2.0
dB
L or R 5%...66% EIM2), MNR
2.0
dB
SAP, white noise, 10% Modulation, MNR 1 kHz L or R or SAP, 100% modulation, 75 s deemphasis, Bandpass 1 kHz L or R 1%...66% EIM2), DBX NR
XTALKBTSC
Stereo SAP SAP Stereo
76 80
dB dB
SEPDBX
Stereo Separation DBX NR 50 Hz...10 kHz 50 Hz...12 kHz Stereo Separation MNR
35 30 30
dB dB dB
SEPMNR FMpil
L = 300 Hz, R = 3.1 kHz 14% Modulation, MNR 4.5 MHz carrier modulated with fh = 15.734 kHz SIF level = 100 mVpp indication: STATUS Bit[6] standard BTSC stereo signal, sound carrier only
Pilot deviation threshold Stereo off on Stereo on off
ANA_IN1+ 3.2 1.2 15.563 3.5 1.5 15.843 kHz kHz kHz
fPilot
1) 2)
Pilot Frequency Range
"s" means "L" or "R" EIM refers to 75-s Equivalent Input Modulation. It is defined as the audio-signal level which results in a stated percentage modulation, when the DBX encoding process is replaced by a 75-s preemphasis network.
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PRELIMINARY DATA SHEET
MSP 34x7G
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
BTSC Characteristics (MSP Standard Code = 20hex, 21hex) with a minimum IF input signal level of 70 mVpp (measured without any video/chroma signal components) S/NBTSC S/N of BTSC Stereo Signal S/N of BTSC-SAP Signal DACM_s, SC1_OUT_s1) 64 55 dB dB 1 kHz L or R or SAP, 100% modulation, 75 s deemphasis, RMS unweighted 0 to 15 kHz 1 kHz L or R or SAP, 100% 75 s EIM2), DBX NR or MNR, RMS unweighted 0 to 15 kHz L or R or SAP, 1%...66% EIM2), DBX NR
THDBTSC
THD+N of BTSC Stereo Signal THD+N of BTSC SAP Signal
0.15 0.8
% %
fRDBX
Frequency Response of BTSC Stereo, 50 Hz...12 kHz Frequency Response of BTSCSAP, 50 Hz...9 kHz
-1.0 -1.0 -2.0 -2.0
1.0 1.0
dB dB
fRMNR
Frequency Response of BTSC Stereo, 50 Hz...12 kHz Frequency Response of BTSCSAP, 50 Hz...9 kHz
2.0
dB
L or R 5%...66% EIM2), MNR
2.0
dB
SAP, white noise, 10% Modulation, MNR 1 kHz L or R or SAP, 100% modulation, 75 s deemphasis, Bandpass 1 kHz L or R 1%...66% EIM2), DBX NR
XTALKBTSC
Stereo SAP SAP Stereo
75 75
dB dB
SEPDBX
Stereo Separation DBX NR 50 Hz...10 kHz 50 Hz...12 kHz Stereo Separation MNR
35 30 30
dB dB dB
SEPMNR
1) 2)
L = 300 Hz, R = 3.1 kHz 14% Modulation, MNR
"s" means "L" or "R" EIM refers to 75-s Equivalent Input Modulation. It is defined as the audio-signal level which results in a stated percentage modulation, when the DBX encoding process is replaced by a 75-s preemphasis network.
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MSP 34x7G
PRELIMINARY DATA SHEET
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
Test Conditions
EIA-J Characteristics (MSP Standard Code = 30hex) S/NEIAJ S/N of EIA-J Stereo Signal S/N of EIA-J Sub-Channel THDEIAJ THD+N of EIA-J Stereo Signal THD+N of EIA-J Sub-Channel fREIAJ Frequency Response of EIA-J Stereo, 50 Hz...12 kHz Frequency Response of EIA-J Sub-Channel, 50 Hz...12 kHz XTALKEIAJ Main SUB Sub MAIN DACM_s, SC1_OUT_s1) 60 60 0.2 0.3 dB dB % % dB dB 100% modulation, 75 s deemphasis 1 kHz L or R, 100% modulation, 75 s deemphasis, RMS unweighted 0 to 15 kHz
-1.0 -1.0
1.0 1.0
66 80
dB dB
1 kHz L or R, 100% modulation, 75 s deemphasis, Bandpass 1 kHz EIA-J Stereo Signal, L or R 100% modulation
SEPEIAJ
Stereo Separation 50 Hz...5 kHz 50 Hz...10 kHz
35 28
dB dB
FM-Radio Characteristics (MSP Standard Code = 40hex) S/NUKW THDUKW S/N of FM-Radio Stereo Signal THD+N of FM-Radio Stereo Signal DACM_s, SC1_OUT_s1) 68 0.1 dB % 1 kHz L or R, 100% modulation, 75 s deemphasis, RMS unweighted 0 to 15 kHz L or R, 1%...100% modulation, 75 s deemphasis
fRUKW
Frequency Response of FM-Radio Stereo 50 Hz...15 kHz Stereo Separation 50 Hz...15 kHz Pilot Frequency Range ANA_IN1+
-1.0
45 18.844
+1.0
dB dB
SEPUKW fPilot
1)
19.125
kHz
standard FM radio stereo signal
"s" means "L" or "R"
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PRELIMINARY DATA SHEET
MSP 34x7G
5. Appendix A: Overview of TV Sound Standards 5.1. NICAM 728
Table 5-1: Summary of NICAM 728 sound modulation parameters
Specification Carrier frequency of digital sound Transmission rate Type of modulation Spectrum shaping Roll-off factor 1.0 Carrier frequency of analog sound component Power ratio between vision carrier and analog sound carrier Power ratio between analog and modulated digital sound carrier 6.0 MHz FM mono 10 dB 0.4 5.5 MHz FM mono 13 dB I 6.552 MHz B/G 5.85 MHz L 5.85 MHz 728 kbit/s Differentially encoded quadrature phase shift keying (DQPSK) by means of Roll-off filters 0.4 6.5 MHz AM mono terrestrial 10 dB cable 16 dB 13 dB 0.4 6.5 MHz FM mono D/K 5.85 MHz
10 dB
7 dB
17 dB
11 dB
China/ Hungary 12 dB
Poland 7 dB
Table 5-2: Summary of NICAM 728 sound coding characteristics
Characteristics Audio sampling frequency Number of channels Initial resolution Companding characteristics Coding for compressed samples Preemphasis Audio overload level Values 32 kHz 2 14 bit/sample near instantaneous, with compression to 10 bits/sample in 32-samples (1 ms) blocks 2's complement CCITT Recommendation J.17 (6.5 dB attenuation at 800 Hz) +12 dBm measured at the unity gain frequency of the preemphasis network (2 kHz)
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MSP 34x7G
5.2. A2 Systems
PRELIMINARY DATA SHEET
Table 5-3: Key parameters for A2 Systems of Standards B/G, D/K, and M
Characteristics TV-Sound Standard Carrier frequency in MHz B/G 5.5 Sound Carrier FM1 D/K 6.5 M 4.5 B/G 5.7421875 Sound Carrier FM2 D/K 6.2578125 6.7421875 5.7421875 20 dB 40 Hz to 15 kHz 50 s 27/50 kHz 75 s 17/25 kHz 50 s 27/50 kHz 75 s 15/25 kHz M 4.724212
Vision/sound power difference Sound bandwidth Preemphasis Frequency deviation (nom/max) Transmission Modes Mono transmission Stereo transmission Dual sound transmission Identification of Transmission Mode Pilot carrier frequency Max. deviation portion Type of modulation / modulation depth Modulation frequency (L+R)/2
13 dB
mono (L+R)/2 R
mono (L-R)/2 language B
language A
54.6875 kHz
55.0699 kHz
2.5 kHz
AM / 50% mono: unmodulated stereo: 117.5 Hz dual: 274.1 Hz 149.9 Hz 276.0 Hz
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PRELIMINARY DATA SHEET
MSP 34x7G
5.3. BTSC-Sound System
Table 5-4: Key parameters for BTSC-Sound Systems
Aural Carrier (L+R) Carrier frequency (fhNTSC = 15.734 kHz) (fhPAL = 15.625 kHz) Sound bandwidth in kHz Preemphasis Max. deviation to Aural Carrier Max. Freq. Deviation of Subcarrier Modulation Type
1)
BTSC-MPX-Components Pilot fh (L-R) 2 fh SAP 5 fh Prof. Ch. 6.5 fh
4.5 MHz
Baseband
0.05 - 15 75 s 73 kHz (total) 25 kHz1) 5 kHz
0.05 - 15 DBX 50 kHz1)
0.05 - 12 DBX 15 kHz 10 kHz FM
0.05 - 3.4 150 s 3 kHz 3 kHz FM
AM
Sum does not exceed 50 kHz due to interleaving effects
5.4. Japanese FM Stereo System (EIA-J)
Table 5-5: Key parameters for Japanese FM-Stereo Sound System EIA-J
Aural Carrier FM Carrier frequency (fh = 15.734 kHz) Sound bandwidth Preemphasis Max. deviation portion to Aural Carrier Max. Freq. Deviation of Subcarrier Modulation Type Transmitter-sided delay Mono transmission Stereo transmission Bilingual transmission 20 s L+R L+R Language A 47 kHz 4.5 MHz EIA-J-MPX-Components (L+R) Baseband 0.05 - 15 kHz 75 s 25 kHz (L-R) 2 fh 0.05 - 15 kHz 75 s 20 kHz 10 kHz FM 0 s - L-R Language B Identification 3.5 fh - none 2 kHz 60% AM 0 s unmodulated 982.5 Hz 922.5 Hz
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MSP 34x7G
5.5. FM Satellite Sound
PRELIMINARY DATA SHEET
Table 5-6: Key parameters for FM Satellite Sound
Carrier Frequency 6.5 MHz 7.02/7.20 MHz 7.38/7.56 MHz 7.74/7.92 MHz Maximum FM Deviation 85 kHz 50 kHz 50 kHz 50 kHz Sound Mode Mono Mono/Stereo/Bilingual Mono/Stereo/Bilingual Mono/Stereo/Bilingual Bandwidth 15 kHz 15 kHz 15 kHz 15 kHz Deemphasis 50 s adaptive adaptive adaptive
5.6. FM-Stereo Radio
Table 5-7: Key parameters for FM-Stereo Radio Systems
Aural Carrier (L+R) Carrier frequency (fp = 19 kHz) Sound bandwidth in kHz Preemphasis: - USA - Europe Max. deviation to Aural Carrier
1)
FM-Radio-MPX-Components Pilot fp (L-R) 2 fp 0.05 - 15 75 s 50 s 10% 90%1) 5% RDS/ARI 3 fh
10.7 MHz
Baseband 0.05 - 15 75 s 50 s
75 kHz (100%)
90%1)
Sum does not exceed 90% due to interleaving effects.
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PRELIMINARY DATA SHEET
MSP 34x7G
6. Appendix B: Manual/Compatibility Mode To adapt the modes of the STANDARD SELECT register to individual requirements and for reasons of compatibility to the MSP 34x7D, the MSP 34x7G offers an Manual/Compatibility Mode, which provides sophisticated programming of the MSP 34x7G. Using the STANDARD SELECT register generally provides a more economic way to program the MSP 34x7G and will result in optimal behavior. Therefore, it is not recommend to use the Manual/Compatibility mode. In those cases, where the MSP 34x7D is to be substituted by the MSP 34x7G, the tips given in Section 6.9. on page 75 have to be obeyed by the controller software.
6.1. Demodulator Write and Read Registers for Manual/Compatibility Mode Table 6-1: Demodulator Write Registers; Subaddress: 10hex; these registers are not readable!
Demodulator Write Registers AUTO_FM/AM Address (hex) 00 21 MSPVersion 3417, 3457 Description 1. MODUS[0]=1 (Automatic Sound Select): Switching Level threshold of Automatic Switching between NICAM and FM/AM in case of bad NICAM reception 2. MODUS[0]=0 (Manual Mode): Activation and configuration of Automatic Switching between NICAM and FM/AM in case of bad NICAM reception A2_Threshold CM_Threshold AD_CV MODE_REG 00 22 00 24 00 BB 00 83 all all all 3417, 3457 A2 Stereo Identification Threshold Carrier-Mute Threshold SIF-input selection, configuration of AGC, and Carrier-Mute Function Controlling of MSP-Demodulator and Interface options. As soon as this register is applied, the MSP 34x7G works in the MSP 34x7D compatibility mode. Warning: In this mode, BTSC, EIA-J, and FM-Radio are disabled. Only MSP 34x7D features are available; the use of MODUS and STATUS register is not allowed. The MSP 34x7G is reset to the normal mode by first programming the MODUS register followed by transmitting a valid standard code to the STANDARD SELECTION register. FIR1 FIR2 DCO1_LO DCO1_HI DCO2_LO DCO2_HI 00 01 00 05 00 93 00 9B 00 A3 00 AB FIR1-filter coefficients channel 1 (6 8 bit) FIR2-filter coefficients channel 2 (6 8 bit), + 3 8 bit offset (total 72 bit) Increment channel 1 Low Part Increment channel 1 High Part Increment channel 2 Low Part Increment channel 2 High Part 00 00 00 00 69 69 00 19hex 00 2Ahex 00 00 00 00 65 65 66 68 Reset Mode 00 00 Page 63
Note: All registers except AUTO_FM/AM, A2_Threshold, and CM_Threshold are initialized during STANDARD SELECTION and are automatically updated when Automatic Sound Select (MODUS[0]=1) is on.
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PRELIMINARY DATA SHEET
Table 6-2: Demodulator Read Registers; Subaddress: 11hex; these registers are not writable!
Demodulator Read Registers C_AD_BITS ADD_BITS CIB_BITS ERROR_RATE PLL_CAPS AGC_GAIN Address (hex) 00 23 00 38 00 3E 00 57 02 1F 02 1E MSPVersion 3417, 3457 Description NICAM-Sync bit, NICAM-C-Bits, and three LSBs of additional data bits NICAM: bit [10:3] of additional data bits NICAM: CIB1 and CIB2 control bits NICAM error rate, updated with 182 ms Not for customer use. Not for customer use. Page 71 71 71 72 72 72
6.2. DSP Write and Read Registers for Manual/Compatibility Mode Table 6-3: DSP-Write Registers; Subaddress: 12hex, all registers are readable as well
Write Register Volume SCART1 channel: Ctrl. mode FM Fixed Deemphasis FM Adaptive Deemphasis Identification Mode FM DC Notch 00 15 00 17 Address (hex) 00 07 00 0F Bits [7:0] [15:8] [7:0] [7:0] [7:0] Operational Modes and Adjustable Range [Linear mode / logarithmic mode] [50 s, 75 s, J17, OFF] [OFF, WP1] [B/G, M] [ON, OFF] Reset Mode 00hex 50 s OFF B/G ON Page 73 73 73 74 74
Table 6-4: DSP Read Registers; Subaddress: 13hex, all registers are not writable
Additional Read Registers Stereo detection register for A2 Stereo Systems DC level readout FM1/Ch2-L DC level readout FM2/Ch1-R Address (hex) 00 18 00 1B 00 1C Bits [15:8] [15:0] [15:0] Output Range [80hex ... 7Fhex] [8000hex ... 7FFFhex] [8000hex ... 7FFFhex] 8 bit two's complement 16 bit two's complement 16 bit two's complement Page 74 74 74
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PRELIMINARY DATA SHEET
MSP 34x7G
6.3.1.1. Function in Automatic Sound Select Mode The Automatic Sound Select feature (MODUS[0]=1) includes the procedure mentioned above. By default, the internal ERROR_RATE threshold is set to 700dec. i.e.: - NICAM analog Sound if ERROR_RATE > 700 - analog Sound NICAM if ERROR_RATE < 700/2 The ERROR_RATE value of 700 corresponds to a BER of approximately 5.46*10-3 /s. Individual configuration of the threshold can be done using Table 6-5. We recommend to use the internal setting used by the standard selection. The optimum NICAM sound can be assigned to the MSP output channels by selecting one of the "Stereo or A/B", "Stereo or A", or "Stereo or B" source channels
6.3. Manual/Compatibility Mode: Description of Demodulator Write Registers 6.3.1. Automatic Switching between NICAM and Analog Sound In case of bad NICAM reception or loss of the NICAM-carrier, the MSP 34x7G offers an Automatic Switching (fall back) to the analog sound (FM/AMmono), without the necessity for the controller of reading and evaluating any parameters. If a proper NICAM signal returns, switching back to this source is performed automatically as well. The feature evaluates the NICAM ERROR_RATE and switches, if necessary, all output channels which are assigned to the NICAM-source, to the analog source, and vice versa. An appropriate hysteresis algorithm avoids oscillating effects (see Fig. 6-1). STATUS[9] and C_AD_BITS[11] (Addr: 0023 hex) provide information about the actual NICAM-FM/AM-status.
6.3.1.2. Function in Manual Mode
Selected Sound
NICAM
analog sound
ERROR_RATE threshold/2 threshold
If the manual mode (MODUS[0]=0) is required, the activation and configuration of the Automatic Switching feature has to be done as described in Table 6-6. Note, that the channel matrix of the corresponding output-channels must be set according to the NICAM-mode and need not to be changed in the FM/ AM-fallback case. Example: Required threshold = 500: bits[10:1] = 00 1111 1010
Fig. 6-1: Hysteresis for Automatic Switching
Table 6-5: Coding of Automatic NICAM/Analog Sound Switching; Automatic Sound Select is on (MODUS[0] = 1)
Mode 1 Default 2 Description Automatic Switching with internal threshold Automatic Switching with external threshold (Customizing of Automatic Sound Select) Forced Analog Mono AUTO_FM [11:0] Addr. = 00 21hex bit[11:0] = 0 bit[11] =0 bit[10:1] = 25...1000 = threshold/2 bit[0] =1 bit[11] =1 bit[10:1] = ignored bit[0] =1 ERROR_RATEThreshold/dec 700 set by customer; recommended range: 50...2000 Source Select: Input at NICAM Path1) NICAM or FM/AM, depending on ERROR_RATE
3
always FM/AM
1)
The NICAM path may be assigned to "Stereo or A/B", "Stereo or A", or "Stereo or B" source channels (see Table 2-2 on page 11).
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Table 6-6: Coding of Automatic NICAM/Analog Sound Switching; Automatic Sound Select is off (MODUS[0] = 0)
Mode 0 reset status 1 Description Forced NICAM (Automatic Switching disabled) Automatic Switching with internal threshold (Default, if Automatic Sound Select is on) Automatic Switching with external threshold (Customizing of Automatic Sound Select) Forced Analog Mono (Automatic Switching disabled) AUTO_FM [11:0] Addr. = 00 21hex bit[11] =0 bit[10:1] = 0 bit[0] =0 bit[11] =0 bit[10:1] = 0 bit[0] =1 bit[11] =0 bit[10:1] = 25...1000 = threshold/2 bit[0] =1 bit[11] =1 bit[10:1] = 0 bit[0] =1
PRELIMINARY DATA SHEET
ERROR_RATEThreshold/dec none
Source Select: Input at NICAM Path always NICAM; Mute in case of no NICAM available NICAM or FM/AM, depending on ERROR_RATE
700
2
set by customer; recommended range: 50...2000 none always FM/AM
3
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MSP 34x7G
6.3.2. A2 Threshold The threshold between Stereo/Bilingual and Mono Identification for the A2 Standard has been made programmable according to the user's preferences. An internal hysteresis ensures robustness and stability. Table 6-7: Write Register on I2C Subaddress 10hex : A2 Threshold Register Address THRESHOLDS 00 22hex (write) A2 THRESHOLD Register Defines threshold of all A2 and EIA_J standards for Stereo and Bilingual detection bit[15:0] 07F0hex ... 0190hex ... 00A0hex force Mono Identification default setting after reset minimum Threshold for stable detection A2_THRESH Function Name
recommended range : 00A0hex...03C0hex
6.3.3. Carrier-Mute Threshold The Carrier-Mute threshold has been made programmable according to the user's preferences. An internal hysteresis ensures stable behavior. Table 6-8: Write Register on I2C Subaddress 10hex : Carrier-Mute Threshold Register Address THRESHOLDS 00 24hex (write) Carrier-Mute THRESHOLD Register Defines threshold for the carrier mute feature bit[15:0] 0000hex ... 002Ahex ... 07FFhex Carrier-Mute always ON (both channels muted) default setting after reset Carrier-Mute always OFF (both channels forced on) CM_THRESH Function Name
recommended range : 0014hex...0050hex
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6.3.4. Register AD_CV The use of this register is no longer recommended. Use it only in cases where compatibility to the MSP 34x7D is required. Using the STANDARD SELECTION register together with the MODUS register provides a more economic way to program the MSP 34x7G Table 6-9: AD_CV Register; reset status: all bits are "0"
AD_CV (00 BBhex) Bit [0] [1:6] Function not used Reference level in case of Automatic Gain Control = on (see Table 6-10). Constant gain factor when Automatic Gain Control = off (see Table 6-11). Determination of Automatic Gain or Constant Gain not used MSP-Carrier-Mute Feature 0 = constant gain 1 = automatic gain must be set to 0 0 = off: no mute 1 = on: mute as described in Section 2.2.2. must be set to 0 Settings must be set to 0
PRELIMINARY DATA SHEET
Automatic setting by STANDARD SELECT Register 2-8, 0A-51hex 0 101000 9 0 100011
[7] [8] [9]
1 0 1
1 0 1
[10:15]
not used
0
0
X: not affected while choosing the TV sound standard by means of the STANDARD SELECT Register
Note: This register is initialized during STANDARD SELECTION and is automatically updated when Automatic Sound Select (MODUS[0]=1) is on.
Table 6-10: Reference values for active AGC (AD_CV[7] = 1)
Application Terrestrial TV - Dual Carrier FM - NICAM/FM - NICAM/AM - NICAM only SAT
1)
Input Signal Contains
AD_CV [6:1] Ref. Value
AD_CV [6:1] in decimal
Range of Input Signal at pin ANA_IN1+
2 FM Carriers 1 FM and 1 NICAM Carrier 1 AM and 1 NICAM Carrier 1 NICAM Carrier only 1 or more FM Carriers
101000 101000 100011 010100 100011
40 40 35 20 35
0.10 - 3 Vpp1) 0.10 - 3 Vpp1) 0.10 - 1.4 Vpp (recommended: 0.10 - 0.8 Vpp) 0.05 - 1.0 Vpp 0.10 - 3 Vpp1)
For signals above 1.4 Vpp, the minimum gain of 3 dB is switched, and overflow of the A/D converter may result. Due to the robustness of the internal processing, the IC works up to and even more than 3 Vpp, if norm conditions of FM/NICAM or FM1/FM2 ratio are supposed. In this overflow case, a loss of FM-S/N-ratio of about 10 dB may appear.
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Table 6-11: AD_CV parameters for constant input gain (AD_CV[7]=0)
Step 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
1)
AD_CV [6:1] Constant Gain 000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100
Gain 3.00 dB 3.85 dB 4.70 dB 5.55 dB 6.40 dB 7.25 dB 8.10 dB 8.95 dB 9.80 dB 10.65 dB 11.50 dB 12.35 dB 13.20 dB 14.05 dB 14.90 dB 15.75 dB 16.60 dB 17.45 dB 18.30 dB 19.15 dB 20.00 dB
Input Level at pin ANA_IN1+ and ANA_IN2+ maximum input level: 3 Vpp (FM) or 1 Vpp (NICAM)1)
maximum input level: 0.14 Vpp
For signals above 1.4 Vpp, the minimum gain of 3 dB is switched, and overflow of the A/D converter may result. Due to the robustness of the internal processing, the IC works up to and even more than 3 Vpp, if norm conditions of FM/NICAM or FM1/FM2 ratio are supposed. In this overflow case, a loss of FM-S/N-ratio of about 10 dB may appear.
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6.3.5. Register MODE_REG Note: The use of this register is no longer recommended. It should be used only in cases where software compatibility to the MSP 34x7D is required. Using the STANDARD SELECTION register together with the MODUS register provides a more economic way to program the MSP 34x7G. As soon as this register is applied, the MSP 34x7G works in the MSP 34x7D Manual/Compatibility Mode. In this mode, BTSC, EIA-J, and FM-Radio are
PRELIMINARY DATA SHEET
disabled. Only MSP 34x7D features are available; the use of MODUS and STATUS register is not allowed. The MSP 34x7G is reset to the normal mode by first programming the MODUS register, followed by transmitting a valid standard code to the STANDARD SELECTION register. The register `MODE_REG' contains the control bits determining the operation mode of the MSP 34x7G in the MSP 34x7D Manual/Compatibility Mode; Table 6- 12 explains all bit positions.
Table 6-12: Control word `MODE_REG'; reset status: all bits are "0"
MODE_REG 00 83hex Bit [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] Function not used DCTR_TRI not used not used not used not used NICAM not used FM AM HDEV Mode of MSP-Ch2 High Deviation Mode (channel matrix must be sound A) Mode of MSP-Ch1 Digital control out 0/1 tri-state Comment Definition 0 : must be used 0 : active 1 : tri-state 1 : recommended 0 : must be used 0 : must be used 1 : recommended 0 : FM 1 : Nicam 0 : must be used 0 : FM 1 : AM 0 : normal 1 : high deviation mode 0 : must be used see also Table 6-14 see also Table 6-14 0 : Gain = 6 dB 1 : Gain = 0 dB 0 : use FIR1 1 : use FIR2 0 : recommended Gain for AM Demodulation 0 : 0 dB (default. of MSPB) 1 : 12 dB (recommended) Automatic setting by STANDARD SELECT Register 2-5 0 X X X X X 0 0 0 0 8,A,B 0 X X X X X 1 0 0 0 9 0 X X X X X 1 0 1 0
[11:10] [12] [13] [14] [15]
not used MSP-Ch1 Gain FIR1-Filter Coeff. Set not used AM-Gain
0 0 1 0 1
0 0 0 0 1
0 0 0 0 1
X: not affected by STANDARD SELECT Register
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The loading sequences must be obeyed. To change a coefficient set, the complete block FIR1 or FIR2 must be transmitted. Note: For compatibility with MSP 3410B, IMREG1 and IMREG2 have to be transmitted. The value for IMREG1 and IMREG2 is 004. Due to the partitioning to 8-bit units, the values 04hex, 40hex, and 00hex arise. 6.3.7. DCO-Registers Note: The use of this register is no longer recommended. It should be used only in cases where software compatibility to the MSP 34x7D is required. Using the STANDARD SELECTION register together with the MODUS register provides a more economic way to program the MSP 34x7G.
Value 04hex 40hex 00hex
Table 6-13: Loading sequence for FIR-coefficients
FIR1 00 01hex (MSP-Ch1: NICAM/FM2) No. 1 2 3 4 5 6 Symbol Name NICAM/FM2_Coeff. (5) NICAM/FM2_Coeff. (4) NICAM/FM2_Coeff. (3) NICAM/FM2_Coeff. (2) NICAM/FM2_Coeff. (1) NICAM/FM2_Coeff. (0) Bits 8 8 8 see Table 6-14 8 8 8 Value
FIR2 00 05hex (MSP-Ch2: FM1/AM) No. 1 2 3 4 5 6 7 8 9 Symbol Name IMREG1 IMREG1 / IMREG2 IMREG2 FM/AM_Coef (5) FM/AM_Coef (4) FM/AM_Coef (3) FM/AM_Coef (2) FM/AM_Coef (1) FM/AM_Coef (0) Bits 8 8 8 8 8 8 see Table 6-14 8 8 8
When selecting a TV-sound standard by means of the STANDARD SELECT register, all frequency tuning is performed automatically. IF manual setting of the tuning frequency is required, a set of 24-bit registers determining the mixing frequencies of the quadrature mixers can be written manually into the IC. In Table 6-15, some examples of DCO registers are listed. It is necessary to divide them up into low part and high part. The formula for the calculation of the registers for any chosen IF-Frequency is as follows: INCRdec = int(f/fs 224) with: int = integer function f = IF-frequency in MHz fS = sampling frequency (18.432 MHz) Conversion of INCR into hex-format and separation of the 12-bit low and high parts lead to the required register values (DCO1_HI or _LO for MSP-Ch1, DCO2_HI or LO for MSP-Ch2).
6.3.6. FIR-Parameter, Registers FIR1 and FIR2 Note: The use of this register is no longer recommended. Use it only in cases where software compatibility to the MSP 34x7D is required. Using the STANDARD SELECTION register together with the MODUS register provides a more economic way to program the MSP 34x7G. Data shaping and/or FM/AM bandwidth limitation is performed by a pair of linear phase Finite Impulse Response filters (FIR-filter). The filter coefficients are programmable and either are configured automatically by the STANDARD SELECT register or written manually by the control processor via the control bus. Two not necessarily different sets of coefficients are required: one for MSP-Ch1 (NICAM or FM2) and one for MSP-Ch2 (FM1 = FM-mono). In Table 6-14 several coefficient sets are proposed. To load the FIR-filters, the following data values are to be transferred 8 bits at a time embedded LSB-bound in a 16-bit word.
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PRELIMINARY DATA SHEET
Table 6-14: 8-bit FIR-coefficients (decimal integer); reset status: all coefficients are "0"
Coefficients for FIR1 00 01hex and FIR2 00 05hex
Terrestrial TV Standards
FM - Satellite FIR filter corresponds to a band-pass with a bandwidth of B = 130 to 500 kHz
B fc frequency
B/G-, D/KNICAM-FM
INICAM-FM FIR1 2 4 FIR2 3 18 27 48 66 72 0
LNICAM-AM FIR1 FIR2
B/G-, D/K-, M-Dual FM FIR2 3 18 27 48 66 72 0
130 kHz FIR2 73 53 64 119 101 127 1
180 kHz FIR2 9 18 28 47 55 64 1
200 kHz FIR2 3 18 27 48 66 72 1
280 kHz FIR2
380 kHz FIR2
500 kHz FIR2
Autosearch FIR2
Coef(i) 0 1 2 3 4 5 ModeREG[12] ModeREG[13]
FIR1
FIR2 3 18 27 48 66 72 0
-2 -8 -10
10 50 86
-2 -8 -10
10 50 86 0
-4 -12 -9
23 79 126
-8 -8
4 36 78 107 1
-1 -9 -16
5 65 123 1
-1 -1 -8
2 59 126 1
-1 -1 -8
2 59 126 0
-6 -4
40 94
0
0
0
1
1
1
1
1
1
1
0
For compatibility, except for the FIR2-AM and the Autosearch-sets, the FIR-filter programming as used for the MSP 3410B is also possible.
Table 6-15: DCO registers for the MSP 34x7G; reset status: DCO_HI/LO = "0000"
DCO1_LO 00 93hex, DCO1_HI 00 9Bhex; DCO2_LO 00 A3hex, DCO2_HI 00 ABhex Freq. MHz 4.5 5.04 5.5 5.58 5.7421875 6.0 6.2 6.5 6.552 7.02 7.38 DCO_HI/hex 03E8 0460 04C6 04D8 04FC 0535 0561 05A4 05B0 0618 0668 DCO_LO/hex 0000 0000 038E 0000 00AA 0555 0C71 071C 0000 0000 0000 5.76 5.85 5.94 6.6 6.65 6.8 7.2 7.56 0500 0514 0528 05BA 05C5 05E7 0640 0690 0000 0000 0000 0AAA 0C71 01C7 0000 0000 Freq. MHz DCO_HI/hex DCO_LO/hex
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Table 6-16: NICAM operation modes as defined by the EBU NICAM 728 specification
C4 0 0 0 C3 0 0 0 0 0 0 0 C2 0 0 1 1 0 0 1 C1 0 1 0 1 0 1 0 Operation Mode Stereo sound (NICAMA/B), independent mono sound (FM1) Two independent mono signals (NICAMA, FM1) Three independent mono channels (NICAMA, NICAMB, FM1) Data transmission only; no audio Stereo sound (NICAMA/B), FM1 carries same channel One mono signal (NICAMA). FM1 carries same channel as NICAMA Two independent mono channels (NICAMA, NICAMB). FM1 carries same channel as NICAMA Data transmission only; no audio Unimplemented sound coding option (not yet defined by EBU NICAM 728 specification)
6.4. Manual/Compatibility Mode: Description of Demodulator Read Registers Note: The use of these register is no longer recommended. It should be used only in cases where software compatibility to the MSP 34x7D is required. Using the STANDARD SELECTION register together with the STATUS register provides a more economic way to program the MSP 34x7G and to retrieve information from the IC. All registers except C_AD_BITs are 8 bit wide. They can be read out of the RAM of the MSP 34x7G if the MSP 34x7D compatibility mode is required. All transmissions take place in 16-bit words. The valid 8-bit data are the 8 LSBs of the received data word. If the Automatic Sound Select feature is not used, the NICAM or FM-identification parameters must be read and evaluated by the controller in order to enable appropriate switching of the channel select matrix of the baseband processing part. The FM-identification registers are described in Section 6.6.1. To handle the NICAM-sound and to observe the NICAM-quality, at least the registers C_AD_BITS and ERROR_RATE must be read and evaluated by the controller. Additional data bits and CIB bits, if supplied by the NICAM transmitter, can be obtained by reading the registers ADD_BITS and CIB_BITS.
0 1 1 1
1 x
0 1
1 x
1 x
AUTO_FM: monitor bit for the AUTO_FM Status: 0: NICAM source is NICAM 1: NICAM source is FM
6.4.1. NICAM Mode Control/Additional Data Bits Register NICAM operation mode control bits and A[2:0] of the additional data bits. Format:
MSB
11 Auto _FM ... ... 7 A[2]
Note: It is no longer necessary to read out and evaluate the C_AD_BITS. All evaluation is performed in the MSP and indicated in the STATUS register.
6.4.2. Additional Data Bits Register Contains the remaining 8 of the 11 additional data bits. The additional data bits are not yet defined by the NICAM 728 system. Format:
MSB
7 6 A[9] 5 A[8]
C_AD_BITS 00 23hex
6 A[1] 5 A[0] 4 C4 3 C3 2 C2 1 C1
LSB
0 S
ADD_BITS 00 38hex
4 A[7] 3 A[6] 2 A[5] 1 A[4]
LSB
0 A[3]
Important: "S" = bit[0] indicates correct NICAM-synchronization (S = 1). If S = 0, the MSP 3417/3457G has not yet synchronized correctly to frame and sequence, or has lost synchronization. The remaining read registers are therefore not valid. The MSP mutes the NICAM output automatically and tries to synchronize again as long as MODE_REG[6] is set. The operation mode is coded by C4-C1 as shown in Table 6-16.
A[10]
6.4.3. CIB Bits Register Cib bits 1 and 2 (see NICAM 728 specifications). Format:
MSB
7 x 6 x 5 x
CIB_BITS 00 3Ehex
4 x 3 x 2 x 1 CIB1
LSB
0 CIB2
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6.4.4. NICAM Error Rate Register
ERROR_RATE Error free maximum error rate 00 57hex 0000hex 07FFhex
PRELIMINARY DATA SHEET
6.4.7. Automatic Search Function for FM-Carrier Detection in Satellite Mode The AM demodulation ability of the MSP 3417G and MSP 3457G offers the possibility to calculate the "field strength" of the momentarily selected FM carrier, which can be read out by the controller. In SAT receivers, this feature can be used to make automatic FM carrier search possible. For this, the MSP has to be switched to AM-mode (MODE_REG[8]), FM-Prescale must be set to 7Fhex= +127dec, and the FM DC notch (see Section 6.5.7.) must be switched off. The sound-IF frequency range must now be "scanned" in the MSP-channel 2 by means of the programmable quadrature mixer with an appropriate incremental frequency (i.e. 10 kHz). After each incrementation, a field strength value is available at the quasi-peak detector output (quasi-peak detector source must be set to FM), which must be examined for relative maxima by the controller. This results in either continuing search or switching the MSP back to FM demodulation mode. During the search process, the FIR2 must be loaded with the coefficient set "AUTOSEARCH", which enables small bandwidth, resulting in appropriate field strength characteristics. The absolute field strength value (can be read out of "quasi peak detector output FM1") also gives information on whether a main FM carrier or a subcarrier was detected; and as a practical consequence, the FM bandwidth (FIR1/2) and the deemphasis (50 s or adaptive) can be switched accordingly. Due to the fact that a constant demodulation frequency offset of a few kHz, leads to a DC level in the demodulated signal, further fine tuning of the found carrier can be achieved by evaluating the "DC Level Readout FM1". Therefore, the FM DC Notch must be switched on, and the demodulator part must be switched back to FM-demodulation mode. For a detailed description of the automatic search function, please refer to the corresponding MSP Windows software.
Average error rate of the NICAM reception in a time interval of 182 ms, which should be close to 0. The initial and maximum value of ERROR_RATE is 2047. This value is also active if the NICAM bit of MODE_REG is not set. Since the value is achieved by filtering, a certain transition time (approx. 0.5 sec) is unavoidable. Acceptable audio may have error rates up to a value of 700 int. Individual evaluation of this value by the controller and an appropriate threshold may define the fallback mode from NICAM to FM/ AM-mono in case of poor NICAM reception. The bit error rate per second (BER) can be calculated by means of the following formula: BER= ERROR_RATE * 12.3*10-6 /s
6.4.5. PLL_CAPS Readback Register It is possible to read out the actual setting of the PLL_CAPS. In standard applications, this register is not of interest for the customer.
PLL_CAPS minimum frequency nominal frequency maximum frequency PLL_CAPS PLL open PLL closed 02 1Fhex L 1111 1111 0101 0110 RESET 0000 0000 02 1Fhex H xxxx xxx0 xxxx xxx1 FFhex 56hex 00hex
6.4.6. AGC_GAIN Readback Register It is possible to read out the actual setting of AGC_GAIN in Automatic Gain Mode. In standard applications, this register is not of interest for the customer .
AGC_GAIN max. amplification (20 dB) min. amplification (3 dB) 02 1Ehex 0001 0100 0000 0000 14hex 00hex
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6.5.2. Volume Modes of SCART1 Output
Volume Mode SCART1 linear 00 07hex 0000 RESET 0001 [3:0] 0hex 1hex
6.5. Manual/Compatibility Mode: Description of DSP Write Registers 6.5.1. Additional Channel Matrix Modes
Loudspeaker Matrix SCART1 Matrix Quasi-Peak Detector Matrix SUM/DIFF AB_XCHANGE PHASE_CHANGE_B PHASE_CHANGE_A A_ONLY B_ONLY 00 08hex 00 0Ahex 00 0Chex 0100 0000 0101 0000 0110 0000 0111 0000 1000 0000 1001 0000 L L L
logarithmic
Linear Mode 40hex 50hex 60hex 70hex 80hex 90hex Volume SCART1 OFF 0 dB gain (digital full scale to 2 VRMS output) +6 dB gain (-6 dBFS to 2 VRMS output) 00 07hex 0000 0000 RESET 0100 0000 0111 1111 H 00hex 40hex 7Fhex
6.5.3. FM Fixed Deemphasis This table shows more modes for the channel matrix registers. The sum/difference mode can be used together with the quasi-peak detector to determine the sound material mode. If the difference signal on channel B (right) is near to zero, and the sum signal on channel A (left) is high, the incoming audio signal is mono. If there is a significant level on the difference signal, the incoming audio is stereo.
FM Deemphasis 50 s 75 s J17 OFF 00 0Fhex 0000 0000 RESET 0000 0001 0000 0100 0011 1111 H 00hex 01hex 04hex 3Fhex
Note: This register is initialized during STANDARD SELECTION and is automatically updated when Automatic Sound Select (MODUS[0]=1) is on. 6.5.4. FM Adaptive Deemphasis
FM Adaptive Deemphasis WP1 OFF WP1 00 0Fhex 0000 0000 RESET 0011 1111 L 00hex 3Fhex
Note: This register is initialized during STANDARD SELECTION and is automatically updated when Automatic Sound Select (MODUS[0]=1) is on. 6.5.5. NICAM Deemphasis A J17 Deemphasis is always applied to the NICAM signal. It is not switchable.
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6.5.6. Identification Mode for A2 Stereo Systems
Identification Mode Standard B/G (German Stereo) Standard M (Korean Stereo) Reset of Ident-Filter 00 15hex 0000 0000 RESET 0000 0001 0011 1111 L 00hex 01hex
PRELIMINARY DATA SHEET
6.6. Manual/Compatibility Mode: Description of DSP Read Registers All readable registers are 16-bit wide. Transmissions via I2C bus have to take place in 16-bit words. Some of the defined 16-bit words are divided into low and high byte, thus holding two different control entities. These registers are not writable.
3Fhex
To shorten the response time of the identification algorithm after a program change between two FM-Stereo capable programs, the reset of the ident-filter can be applied. Sequence: 1. Program change 2. Reset ident-filter 3. Set identification mode back to standard B/G or M 4. Wait approx. 500 ms 5. Read stereo detection register Note: This register is initialized during STANDARD SELECTION and is automatically updated when Automatic Sound Select (MODUS[0]=1) is on. 6.5.7. FM DC Notch The DC compensation filter (FM DC Notch) for FM input can be switched off. This is used to speed up the automatic search function (see Section 6.4.7.). In normal FM-mode, the FM DC Notch should be switched on.
FM DC Notch ON OFF 00 17hex 0000 0000 Reset 0011 1111 L 00hex 3Fhex
6.6.1. Stereo Detection Register for A2 Stereo Systems
Stereo Detection Register MONO STEREO BILINGUAL 00 18hex near zero positive value (ideal reception: 7Fhex) negative value (ideal reception: 80hex) H
Note: It is no longer necessary to read out and evaluate the A2 identification level. All evaluation is performed in the MSP and indicated in the STATUS register.
6.6.2. DC Level Register
DC Level Readout FM1 (MSP-Ch2) DC Level Readout FM2 (MSP-Ch1) DC Level 00 1Bhex 00 1Chex H+L H+L
[8000hex ... 7FFFhex] values are 16 bit two's complement
The DC level register measures the DC component of the incoming FM signals (FM1 and FM2). This can be used for seek functions in satellite receivers and for IF FM frequencies fine tuning. A too low demodulation frequency (DCO) results in a positive DC-Level and vice versa. For further processing, the DC content of the demodulated FM signals is suppressed. The time constant , defining the transition time of the DC Level Register, is approximately 28 ms.
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PRELIMINARY DATA SHEET
MSP 34x7G
6.8. Exclusions of Audio Baseband Features In general, all functions can be switched independently. Two exceptions exist: 1. NICAM cannot be processed simultaneously with the FM2 channel. 2. FM adaptive deemphasis cannot be processed simultaneously with FM-identification.
6.7. Demodulator Source Channels in Manual Mode 6.7.1. Terrestric Sound Standards Table 6-17 shows the source channel assignment of the demodulated signals in case of manual mode for all terrestric sound standards. See Table 2-2 for the assignment in the Automatic Sound Select mode. In manual mode for terrestric sound standards, only two demodulator sources are defined.
6.9. Compatibility Restrictions to MSP 34x7D 6.7.2. SAT Sound Standards Table 6-18 shows the source channel assignment of the demodulated signals for SAT sound standards. The MSP 34x7G is fully hardware compatible to the MSP 34x7D. However, to substitute a MSP 34x7D by the corresponding MSP 34x7G, the controller software has to be adapted slightly: 1. The register FM-Matrix (00 0Ehex low part) must be changed from "no matrix (00hex)" to "sound A mono (03hex)" during mono transmission of all TV-sound standards (see also Table 6-17). 2. With the MSP 34x7G, the STANDARD SELECTION initializes the FM-deemphasis, which is not the case for the MSP 34x7D. So, if STANDARD SELECTION is applied, this I2C instruction can be omitted.
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Table 6-17: Manual Sound Select Mode for Terrestric Sound Standards
PRELIMINARY DATA SHEET
Source Channels of Sound Select Block Broadcasted Sound Standard B/G-FM D/K-FM M-Korea M-Japan Selected MSP Standard Code 03 04, 05 02 30 Broadcasted Sound Mode MONO STEREO BILINGUAL, Languages A and B B/G-NICAM L-NICAM I-NICAM D/K-NICAM D/K-NICAM
(with high deviation FM)
FM Matrix
FM/AM
(use 0 for channel select)
Stereo or A/B
(use 1 for channel select)
Sound A Mono German Stereo Korean Stereo No Matrix Sound A Mono1)
Mono Stereo Left = A Right = B analog Mono
Mono Stereo Left = A Right = B no sound with AUTO_FM: analog Mono
08 09 0A 0B 0C 0D
NICAM not available or NICAM error rate too high MONO STEREO BILINGUAL, Languages A and B MONO
Sound A Mono1) Sound A Mono1) Sound A Mono1) Sound A Mono Korean Stereo Sound A Mono Korean Stereo Sound A Mono
analog Mono analog Mono analog Mono Mono Stereo Mono Stereo Mono
NICAM Mono NICAM Stereo Left = NICAM A Right = NICAM B Mono Stereo Mono Stereo Mono
20
STEREO MONO + SAP
BTSC
STEREO + SAP MONO 21 STEREO MONO + SAP STEREO + SAP
No Matrix Sound A Mono Korean Stereo
Left = Mono Right = SAP Mono Stereo
Left = Mono Right = SAP Mono Stereo
FM-Radio
1)
40
MONO STEREO
Automatic refresh to Sound A Mono, do not write any other value to the register FM Matrix!
Table 6-18: Manual Sound Select Modes for SAT-Standards
Source Channels of Sound Select Block for SAT-Modes Broadcasted Sound Standard Selected MSP Standard Code 6, 50hex FM SAT 51hex Broadcasted Sound Mode FM Matrix FM/AM
(source select: 0)
Stereo or A/B
(source select: 1)
Stereo or A
(source select: 3)
Stereo or B
(source select: 4)
MONO STEREO BILINGUAL
Sound A Mono No Matrix No Matrix
Mono Stereo Left = A (FM1) Right = B (FM2)
Mono Stereo Left = A (FM1) Right = B (FM2)
Mono Stereo A (FM1)
Mono Stereo B (FM2)
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PRELIMINARY DATA SHEET
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7. Appendix D: Application Information 7.1. Phase Relationship of Analog Outputs The user does not need to correct output phases when using the loudspeaker output directly. The SCART1 output has opposite phase. The following schematics shows the phase relationship of all analog inputs and outputs.
Loudspeaker
Audio Baseband Processing
SCART1 SCART DSP Input Select MONO
SCART1-Ch. SCART1
MONO, SCART1
SCART Output Select
Fig. 7-1: Phase diagram of the MSP 34x7G
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7.2. Application Circuit
PRELIMINARY DATA SHEET
Signal GND SIF 1 IN
10 F + 3.3 F 56 pF 56 pF + 100 nF 100 nF 18.432 MHz
C s. section 4.6.2.
8 V (5 V)
100 p
56 p
Tuner
ANA_IN1+
+ 10 F 1 k
Alternative circuit for SIF-input for more attenuation of video components:
XTAL_OUT
ANA_IN-
ANA_IN1+
VREFTOP
AGNDC
XTAL_IN
CAPL_M
1 F
DACM_L 330 nF MONO_IN 1 nF DACM_R 330 nF 330 nF SC1_IN_L 1 nF SC1_IN_R
1 F
Loudspeaker
5V 5V
DVSS ADR_SEL DVSS I2C_DA I2C_CL STANDBYQ
MSP 34x7G
SC1_OUT_L SC1_OUT_R
100
+
22 F 22 F
100
+
D_CTR_I/O_0 D_CTR_I/O_1
TESTEN AHVSS RESETQ AHVSUP DVSUP AHVSS AVSUP VREF1 AHVSS VREF2 AHVSS
DVSS
RESETQ (from Controller, see section 4.6.3.3.)
220 pF 470 pF 1.5 nF 10 F
470 pF 1.5 nF 10 F
AVSS AVSS
470 pF 1.5 nF 10 F
5V
5V
8V (5 V)
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AHVSS
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PRELIMINARY DATA SHEET
MSP 34x7G
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8. Appendix E: MSP 34x7G Version History 9. Data Sheet History
PRELIMINARY DATA SHEET
MSP 34x7G-B6 - improved AM-performance (see page 53) - new D/K standard for Poland (see Table 3-7 on page 18) - improved I2C hardware problem handling (see Section 3.1.1. on page 14) - faster system-D/K-loop for stereo detection - extended features in the CONTROL register (see Section 3.1.2. on page 15)
1. Preliminary data sheet: "MSP 34x7G Multistandard Sound Processor Family", Edition Sept. 7, 2000, 6251-535-1PD. First release of the preliminary data sheet. 2. Preliminary data sheet: "MSP 34x7G Multistandard Sound Processor Family", March 5, 2001, 6251-535-2PD. Second release of the preliminary data sheet. Major changes: - I2C-bus description changed - ACB register: documentation for bit allocation D_CTR_I/O changed
MSP 34x7G-B8 - fine-tuning of A2-identification and carrier mute - EIA-J identification: faster transition time stereo/ bilingual to mono - J17 FM-deemphasis implemented - input specification for RESETQ and TESTEN changed
Micronas GmbH Hans-Bunte-Strasse 19 D-79108 Freiburg (Germany) P.O. Box 840 D-79008 Freiburg (Germany) Tel. +49-761-517-0 Fax +49-761-517-2174 E-mail: docservice@micronas.com Internet: www.micronas.com Printed in Germany Order No. 6251-535-2PD
All information and data contained in this data sheet are without any commitment, are not to be considered as an offer for conclusion of a contract, nor shall they be construed as to create any liability. Any new issue of this data sheet invalidates previous issues. Product availability and delivery are exclusively subject to our respective order confirmation form; the same applies to orders based on development samples delivered. By this publication, Micronas GmbH does not assume responsibility for patent infringements or other rights of third parties which may result from its use. Further, Micronas GmbH reserves the right to revise this publication and to make changes to its content, at any time, without obligation to notify any person or entity of such revisions or changes. No part of this publication may be reproduced, photocopied, stored on a retrieval system, or transmitted without the express written consent of Micronas GmbH.
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Preliminary Data Sheet Supplement
Subject: Data Sheet Concerned: Supplement: Edition:
MSP 34xxG Version History All MSP 34xxG Data Sheets No. 2/ 6251-525-2PDS Oct. 11, 2000
Version Changes within the MSP 34xxG Family: For a detailed description of the below-mentioned items, see the corresponding data sheets. For quick reference, check the version history in the data sheet appendices.
MSP 34x0G MSP 34x1G MSP 34x2G MSP 34x5G MSP 34x7G technology power dissipation (typical) at 8 V operation 0.8 0.5 0.5 A4 B5 A4 B4 A1 B5 B6 A2 A1 B6 B6 0.5 B8 B8 0.45 B8 B8
MSP 34x0/x1/x5/x7 740 mW 640 mW 640 mW 640 mW 600 mW 690 mW MSP 34x2 x 8.4 V 8.4 V 8.7 V x x x x 8.7 V x x x x x x x x x x 8.7 V x x x x x x x x x x x x x
digital input specification change specification of max. analog high voltage (AHVSUP) programmable A2 and carrier mute thresholds new Standard Select Mode 0Dhex: D/K-NICAM together with HDEV3 FM mode additional preference "color" for 4.5 MHz carrier in Automatic Standard Detection improved AM-performance (better SNR and THD) new Standard Select Mode 07hex: D/K3 for Poland faster system D/K loop for stereo detection (standards 4, 5, 7, B with ASS = on) improved I2C hardware problem handling extended features in the CONTROL register (readout hardware / reset status) Micronas Dynamic Bass (MDB) Micronas Dynamic Bass (improved MDB) faster identification for all standards, major speedup of identification for EIA-J standard faster carrier mute J17 deemphasis MSP 34x0/x1/x2 MSP 34x0/x1/x2
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